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US4399398A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage reference circuit with feedback circuit

Assignee: RCA Corp
•
Filing: 1981-06-30
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Granted: 1983-08-16
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Expires: 2001-06-30
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Abstract

Abstract A bandgap reference voltage generating circuit develops a predetermined reference potential between first and second terminals. A pair of transistors are operated at different emitter current densities to develop a difference between their base-emitter potentials. That difference is applied across a first resistance and is increased and applied across a second resistance. The reference potential comprises the sum of at least the scaled-up potential and the conduction potential of a semiconductor junction. A regulating transistor completes a degenerative feedback connection and controls the current flowing between the first and second terminals responsive to the reference potential departing from the predetermined value. A regenerative feedback connection responds to the current in the regulating transistor to decrease the potential across the second resistance when the controlled current increases.

Inventors

  • 👤 Harold A. Wittlinger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 15:33
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/30

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 237 words
A circuit for developing a predetermined value of reference potential between first and second terminals comprising: a pair of transistors; first and second resistances; means connecting said pair of transistors and said first and second resistances in circuit between said first and second terminals for operating said pair of transistors at different emitter current densities to develop a difference between their respective base-emitter potentials, wherein said first resistance is connected for receiving said difference potential and said second resistance is connected for receiving said difference potential increased in proportion to the resistances of said first and second resistances, and wherein at least the potential across said second resistance is summed with the conduction potential of at least one semiconductor junction to develop said reference potential between said first and second terminals; regulating means, coupled between said first and second terminals to conduct a controlled current therebetween, for maintaining said reference potential at said predetermined value by increasing and decreasing said controlled current flowing between said first and second terminals in response to said reference potential departing from said predetermined value in increasing and decreasing senses, respectively, wherein said regulating means provides a degenerative (negative) feedback connection; and control means for maintaining said reference potential at said predetermined value by controlling the potential across said second resistance in response to said controlled current flowing through said regulating means, wherein said control means provides a regenerative (positive) feedback connection.
Claim 2
Dependent Claim 237 words
A circuit for developing a predetermined value of reference potential between first and second terminals comprising: a pair of transistors; first and second resistances; means connecting said pair of transistors and said first and second resistances in circuit between said first and second terminals for operating said pair of transistors at different emitter current densities to develop a difference between their respective base-emitter potentials, wherein said first resistance is connected for receiving said difference potential and said second resistance is connected for receiving said difference potential increased in proportion to the resistances of said first and second resistances, and wherein at least the potential across said second resistance is summed with the conduction potential of at least one semiconductor junction to develop said reference potential between said first and second terminals; regulating means, coupled between said first and second terminals to conduct a controlled current therebetween, for maintaining said reference potential at said predetermined value by increasing and decreasing said controlled current flowing between said first and second terminals in response to said reference potential departing from said predetermined value in increasing and decreasing senses, respectively, wherein said regulating means provides a degenerative (negative) feedback connection; and control means for maintaining said reference potential at said predetermined value by controlling the potential across said second resistance in response to said controlled current flowing through said regulating means, wherein said control means provides a regenerative (positive) feedback connection.
Claim 3
Dependent Claim 49 words
The circuit as set forth in claim 1 wherein: said regulating means is connected between said first and second terminals for conducting said controlled current therebetween; and said control means decreases and increases the potential across said second resistance responsive to increase and decrease, respectively, in said controlled current.
Claim 4
Dependent Claim 28 words
The circuit as set forth in claim 2 wherein said control means includes means for causing said controlled current to flow in a portion of said first resistance.
Claim 5
Dependent Claim 56 words
The circuit as set forth in claim 2 wherein said control means includes a third resistance through which said controlled current flows, means for connecting one end of said third resistance to one end of said first resistance, and a fourth resistance connected between the respective other ends of said first resistance and said third resistance.
Claim 6
Dependent Claim 38 words
The circuit as set forth in claim 4 wherein said third resistance exhibits a resistance substantially less than that of said first resistance and said fourth resistance exhibits a resistance substantially greater than that of said first resistance.
Claim 7
Dependent Claim 70 words
The circuit as set forth in claim 3 or 4 wherein the one end of said first resistance connects to said first terminal and the other end thereof connects to the emitter electrode of a first one of said pair of transistors, the emitter electrode of the other of said pair of transistors connects to said first terminal, and the respective base electrodes of said pair of transistors connect together.
Claim 8
Dependent Claim 81 words
The circuit as set forth in claim 1 or 2 wherein said regulating means includes: a regulating transistor having a principal conduction path between its output and common electrodes coupled between said first and second terminals, and having an input electrode coupled for receiving an error signal; and means responsive to said reference potential for developing said error signal poled to increase the conduction of said regulating transistor when the potential between said first and second terminals exceeds said predetermined value.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-08-15 1987-02-14 1987-08-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-08-15 1991-02-14 1991-08-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-08-15 1995-02-14 1995-08-16 $7700.00 Window Closed / Lapsed

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