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US4398962A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of controlling base contact regions by forming a blocking layer contiguous to a doped poly-si emitter source

Assignee: Toshiba Corp
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Filing: 1981-09-28
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Granted: 1983-08-16
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Expires: 2001-09-28
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Abstract

Abstract A method of manufacturing a semiconductor device includes a step of forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer. An ion implantation blocking layer is formed to cover the top and side surfaces of the doped film and the exposed surface of the semiconductor layer. Then, the blocking layer is anisotropically etched by irradiating it with a dry etchant in a direction substantially normal to the semiconductor layer. The anisotropic etching is carried out until the top surface of the doped film is substantially exposed, thereby allowing a portion of the blocking layer to leave surrounding the doped film and also substantially forming a base contact hole defined by the exposed side surface of the remaining blocking layer. Subsequently, ion implantation is conducted against the semiconductor layer with the remaining blocking layer used as a mask, to form at least a base contact region of a high impurity concentration in a portion of the semiconductor layer corresponding to the base contact hole.

Inventors

  • 👤 Mamoru Kanazawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 12:42
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D48/345; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S148/00; Y10S148/092

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 209 words
A method of manufacturing a semiconductor device comprising the steps in the following order of: (a) forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer which surface area constitutes an island region isolated by an insulating layer; (b) forming an ion implantation blocking layer covering said doped film and the exposed surface of said semiconductor layer; (c) anisotropically etching said blocking layer until the surface of said doped film is substantially exposed, by irradiating said blocking layer with a dry etchant in a direction substantially normal to said semiconductor layer, thereby allowing a portion of said blocking layer to remain surrounding said doped film and substantially forming a base contact hole defined between the exposed side surfaces of said remaining blocking layer and said insulating layer; (d) conducting ion implantation with respect to said semiconductor layer, with said remaining blocking layer and said doped film used as a mask, to form at least a base contact region of a high impurity concentration in a portion of said semiconductor layer corresponding to said base contact hole; and (e) forming an emitter region in said semiconductor layer by diffusing the impurity from said doped film into said semiconductor layer by a thermal treatment.
Claim 2
Independent Claim 209 words
A method of manufacturing a semiconductor device comprising the steps in the following order of: (a) forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer which surface area constitutes an island region isolated by an insulating layer; (b) forming an ion implantation blocking layer covering said doped film and the exposed surface of said semiconductor layer; (c) anisotropically etching said blocking layer until the surface of said doped film is substantially exposed, by irradiating said blocking layer with a dry etchant in a direction substantially normal to said semiconductor layer, thereby allowing a portion of said blocking layer to remain surrounding said doped film and substantially forming a base contact hole defined between the exposed side surfaces of said remaining blocking layer and said insulating layer; (d) conducting ion implantation with respect to said semiconductor layer, with said remaining blocking layer and said doped film used as a mask, to form at least a base contact region of a high impurity concentration in a portion of said semiconductor layer corresponding to said base contact hole; and (e) forming an emitter region in said semiconductor layer by diffusing the impurity from said doped film into said semiconductor layer by a thermal treatment.
Claim 3
Dependent Claim 23 words
The method according to claim 1, wherein said anisotropic etching is carried out until the surface of said doped film is completely exposed.
Claim 4
Dependent Claim 30 words
The method according to claim 1, wherein said anisotropic etching is carried out such that said blocking layer is slightly left also on said doped film and said semiconductor layer.
Claim 5
Dependent Claim 19 words
The method according to claim 1, wherein said blocking layer is formed of silicon oxide, silicon nitride or glass.
Claim 6
Dependent Claim 14 words
The method according to claim 1, wherein said semiconductor layer is formed of silicon.
Claim 7
Dependent Claim 13 words
The method according to claim 1, wherein said doped film comprises polycrystalline silicon.
Claim 8
Dependent Claim 23 words
The method according to claim 1, wherein said blocking layer comprises a thermal oxide film and a chemical vapor deposition film formed thereon.
Claim 9
Dependent Claim 20 words
The method according to claim 1, wherein said dry etchant is a reactive ion etchant or an inactive ion etchant.
Claim 10
Dependent Claim 33 words
The method according to claim 1, further comprising forming a base active region in said semiconductor layer under said remaining blocking layer and slaid doped film by said ion implantation during step (d).
Claim 11
Dependent Claim 23 words
The method according to claim 1, further comprising forming, before step (a), a base active region in said semiconductor layer by ion implantation.
Claim 12
Dependent Claim 31 words
The method according to claim 3, wherein the slightly remaining blocking layer on said doped film and said semiconductor layer is removed by wet etching after said ion implantation step (d).
Claim 13
Dependent Claim 24 words
The method according to claim 8, wherein said reactive ion etchant is derived from a mixture of carbon tetrafluoride and hydrogen through glow discharge.
Claim 14
Dependent Claim 24 words
The method according to claim 8, wherein said reactive ion etchant is derived from a mixture of carbon monobromotrifluoride and chlorine through glow discharge.
Claim 15
Independent Claim 227 words
A method of manufacturing a semiconductor device comprising the steps of the following order of: (a) forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer which surface area constitutes an island region isolated by an insulating layer; (b) forming an ion implantation blocking layer covering said dope film and the exposed surface of said semiconductor layer; (c) anisotropically etching said portion of said blocking layer by irradiating said blocking layer with a dry etchant in a direction substantially normal to said semiconductor layer, thereby allowing a portion of said blocking layer to remain surrounding said doped film and substantially forming a base contact hole defined between the exposed side surfaces of said remaining blocking layer and said insulating layer; (d) conducing ion implantation with respect to said semiconductor layer, with said remaining blocking layer and said doped film used as a mask, to form at least a base contact region of a high impurity concentration in a portion of said semiconductor layer corresponding to said base contact hole; (e) anisotropically etching the remainder of said blocking layer in the manner of step (c) until the surface of said doped film is substantially exposed; and (f) forming an emitter region in said semiconductor layer by diffusing the impurity from said doped film into said semiconductor layer by a thermal treatment.
Claim 16
Independent Claim 227 words
A method of manufacturing a semiconductor device comprising the steps of the following order of: (a) forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer which surface area constitutes an island region isolated by an insulating layer; (b) forming an ion implantation blocking layer covering said dope film and the exposed surface of said semiconductor layer; (c) anisotropically etching said portion of said blocking layer by irradiating said blocking layer with a dry etchant in a direction substantially normal to said semiconductor layer, thereby allowing a portion of said blocking layer to remain surrounding said doped film and substantially forming a base contact hole defined between the exposed side surfaces of said remaining blocking layer and said insulating layer; (d) conducing ion implantation with respect to said semiconductor layer, with said remaining blocking layer and said doped film used as a mask, to form at least a base contact region of a high impurity concentration in a portion of said semiconductor layer corresponding to said base contact hole; (e) anisotropically etching the remainder of said blocking layer in the manner of step (c) until the surface of said doped film is substantially exposed; and (f) forming an emitter region in said semiconductor layer by diffusing the impurity from said doped film into said semiconductor layer by a thermal treatment.

References Cited (Backward Citations)

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US4279671A Cited
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US4234362A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-08-15 1987-02-14 1987-08-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-08-15 1991-02-14 1991-08-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-08-15 1995-02-14 1995-08-16 $7700.00 Window Closed / Lapsed

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