Control store apparatus having dual mode operation handling mechanism

Claim 2

A microprogram-controlled data processor system wherein a set of system control words is augmented by a plurality of series of user-generated control words, said system comprising: a control store for storing and selectively outputting said plurality of series of user-generated control words, each of said stored user-generated control words including an address field and being addressable in said control store in a first control store addressing mode or a second control store addressing mode independent of said first control store addressing mode; a central processing unit coupled to said control store for executing said system control words and said user-generated control words outputted by said control store; means for selecting said first control store addressing mode of said second control store addressing mode, said selecting means comprising a manually-operated switch; first address generating means responsive to the selection of said first control store addressing mode for individually generating the address of the next user-generated control word in said control store to be executed by said central processor unit responsive to the contents of said address field; second address generating means responsive to the selection of said second control store addressing mode for selectively generating the addresses of user-generated control words stored in said control store independently of said address fields; and means for receiving said generated addresses from said first address generating means and said second address generating means, for addressing said user-generated control words stored in said control store in accordance with said received addresses and for transferring said addressed user-generated control words to said central processor unit.

Claim 3

The system of claim 1 wherein said first address generating means comprises a next address generator for interpreting a said user-generated control word being executed by said central processor unit to generate the address in said control store of the next user-generated control word to be addressed and executed.

Claim 4

The system of claim 2 wherein said user-generated control words stored in said control store and executed by said central processor unit include (1) jump instructions, each of said jump instructions including a non-returning jump address and indicating a non-returning branch to an address of another user-generated control word stored in said control store, (2) subroutine call instructions, each of said subroutine call instructions including a subroutine return address and indicating a returning branch to an address of another user-generated control word stored in said control store, and (3) sequential processing instructions for indicating sequential addressing of said user-generated control words stored in said control store.

Claim 5

The system of claim 3 wherein said second address generating means comprises: a sequential address generating means for generating a series of sequential addresses of said user-generated control words stored in said control store; an increment address counter receiving said address field of said subroutine call instruction being executed by said control store and for incrementing the contents of said address field to generate an incremented address field; subroutine return register means for receiving said incremented address field from said increment address counter to store a subroutine return address corresponding to an address of a user-generated control word stored in said control store; and jump address register means for receiving the address field of said jump instructions transferred by said receiving, addressing, and transferring means to said central processor unit to store a non-returning jump address corresponding to a said user-generated control word stored in said control store.

Claim 6

The system of claim 4 wherein said receiving, addressing, and transferring means comprises multiplexer means for (1) selectively addressing a said user-generated control word stored in said control store with said address generated by said next address generator when said first control store addressing mode is selected, and (2) selectively addressing a user-generated control word stored in said control store with a said sequential address, a said subroutine return address, or a said non-returning jump address in response to the execution by said central processor unit of a said sequential processing instruction, a said subroutine call instruction, or a said jump instruction, respectively, when said second control store addressing mode is selected.

Claim 7

The system of claim 5 wherein said sequential address generating means comprises an incremental counter.

Claim 8

A data processing system for executing a microprogram wherein said microprogram comprises a series of microinstructions, each of said microinstructions being associated with one or more firmware control words, said data processing system comprising: a central processor unit for executing firmware control words; a control store for addressably storing a series of user-generated firmware control words, each of said user-generated firmware control words including an operand field for storing the designation of an operation to be performed by said central processor unit and a next address field for storing a designation of an address in said control store of the next user-generated firmware control word to be executed; a next address generator coupled to said central processor unit for interpreting a said user-generated firmware control word being executed by said central processor unit to generate in a first user-generated firmware control word addressing mode the address in said control store of the next user-generated control word to be executed by said central processor unit responsive to the right address field; means for generating in a second user-generated firmware control word addressing mode the address in said control store of the next user-generated firmware control word to be executed by said central processor unit independently of the address field of the user-generated firmware control word being executed by said central processor unit; means for selecting said first user-generated firmware control word addressing mode or said second user-generated firmware conrol word addressing mode, said selecting means comprising a manually-operated switch; means responsive to said selecting means for addressing said control store to cause said control store to output a said user-generated firmware control word and for transferring said outputted user-generated firmware control word to said central processor unit; and means for selectively supplying to said addressing and transferring meas either a said address generated by said next address generator or a said address generated by said address generating means.

Claim 9

A data processing system for executing a microprogram wherein said microprogram comprises a series of microinstructions, each of said microinstructions being associated with one or more firmware control words, said data processing system comprising: a central processor unit for executing firmware control words; a control store for addressably storing a series of user-generated firmware control words, each of said user-generated firmware control words including an operand field for storing the designation of an operation to be performed by said central processor unit and a next address field for storing a designation of an address in said control store of the next user-generated firmware control word to be executed; a next address generator coupled to said central processor unit for interpreting a said user-generated firmware control word being executed by said central processor unit to generate in a first user-generated firmware control word addressing mode the address in said control store of the next user-generated control word to be executed by said central processor unit responsive to the right address field; means for generating in a second user-generated firmware control word addressing mode the address in said control store of the next user-generated firmware control word to be executed by said central processor unit independently of the address field of the user-generated firmware control word being executed by said central processor unit; means for selecting said first user-generated firmware control word addressing mode or said second user-generated firmware conrol word addressing mode, said selecting means comprising a manually-operated switch; means responsive to said selecting means for addressing said control store to cause said control store to output a said user-generated firmware control word and for transferring said outputted user-generated firmware control word to said central processor unit; and means for selectively supplying to said addressing and transferring meas either a said address generated by said next address generator or a said address generated by said address generating means.

Claim 10

A data processing system as in claim 7 wherein said operations indicated by said operand fields of said series of user-generated firmware control words include sequential processing operations and subroutine call operations indicating a returning branch to an address of another user-generated firmware control word in said control store, each of said user-generated firmware control words designating a subroutine call operation including in the address field thereof a subroutine return address corresponding to the next user-generated firmware control word to be executed.

Claim 11

A data processing system as in claim 8 wherein said user-generated firmware control words are stored in sequential addresses in said control store.

Claim 12

A data processing system as in claim 9 wherein said address generating means comprises: sequential addressing means for generating the address of the next user-generated firmware control word in said control store to be executed in response to the execution by said central processor unit of a user-generated firmware control word having an operand field designating a sequential processing operation by incrementing the content of the address field of said user-generated firmware control word being executed by said central processor unit; and subroutine return register means for storing said subroutine return address corresponding to the address in said control store of the next executable user-generated firmware control word following the return from a subroutine branch in response to the execution by said central processor unit of a said user-generated firmware control word having an operand field designating a subroutine call operation.

Claim 13

A data processing system as in claim 10 wherein said selectively supplying means comprises a multiplexer.

Claim 14

A data processing system as in claim 11 wherein said operations indicated by said operand field of said user-generated firmware control words further include non-returning branch operations and wherein each of said user-generated firmware control words indicating a non-returning branch operation includes a non-returning jump address.

Claim 15

A data processing system as in claim 12 further including a jump address register means for storing said non-returning jump address designated by said user-generated firmware control word being executed by said central processor unit having an operand field indicating a non-returning branch operation.

Claim 16

A data processing system as in claim 13 further including an address override means controlled by said central processor unit for supplying to said addressing means said address stored in said jump address register means in response to the execution of a said non-returning branch operation by said central processor unit.

Claim 17

A data processing system for executing a microprogram wherein said microprogram comprises a series of microinstructions, each of said microinstructions being associated with one or more firmware control words, said data processing system comprising: a central processor unit for executing firmware control words; a control store for addressably storing a series of user-generated firmware control words, each of said user-generated firmware control words including an operand field for storing the designation of an operation to be performed by said central processor unit and a next address field for storing a designation of an address in said control store of the next user-generated firmware control word to be executed; a next address generator coupled to said central processor unit for interpreting a said user-generated firmware control word being executed by said central processor unit to generate in a first user-generated firmware control word addressing mode the address in said control store of the next user-generated control word to be executed by said central processor unit responsive to the next address field; means for generating in a second user-generated firmware control word addressing mode the address in said control store of the next user-generated firmware control word to be executed by said central processor unit independently of the address field of the user-generated firmware control word being executed by said central processor unit; manual switch means for selecting said first user-generated firmware control word addressing mode or said second user-generated firmware control word addressing mode; means responsive to said selecting means for addressing said control store to cause said control store to output a said user-generated firmware control word and for transferring said outputted user-generated firmware control word to said central processor unit; and means for selectively supplying to said addressing and transferring means either a said address generated by said next address generator or a said address generated by said address generating means.

Claim 18

A data processing system for executing a microprogram wherein said microprogram comprises a series of microinstructions, each of said microinstructions being associated with one or more firmware control words, said data processing system comprising: a central processor unit for executing firmware control words; a control store for addressably storing a series of user-generated firmware control words, each of said user-generated firmware control words including an operand field for storing the designation of an operation to be performed by said central processor unit and a next address field for storing a designation of an address in said control store of the next user-generated firmware control word to be executed; a next address generator coupled to said central processor unit for interpreting a said user-generated firmware control word being executed by said central processor unit to generate in a first user-generated firmware control word addressing mode the address in said control store of the next user-generated control word to be executed by said central processor unit responsive to the next address field; means for generating in a second user-generated firmware control word addressing mode the address in said control store of the next user-generated firmware control word to be executed by said central processor unit independently of the address field of the user-generated firmware control word being executed by said central processor unit; manual switch means for selecting said first user-generated firmware control word addressing mode or said second user-generated firmware control word addressing mode; means responsive to said selecting means for addressing said control store to cause said control store to output a said user-generated firmware control word and for transferring said outputted user-generated firmware control word to said central processor unit; and means for selectively supplying to said addressing and transferring means either a said address generated by said next address generator or a said address generated by said address generating means.