Patent US2046084A successfully refreshed from Google Patents.
Patent US4413670A successfully refreshed from Google Patents.
Patent US4390899A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4390899A Expired / Lapsed US ⏱️ 0.0 years remaining

Television signal processing system

Assignee: Faurecia Clarion Electronics Co Ltd
•
Filing: 1980-12-29
•
Granted: 1983-06-28
•
Expires: 2000-12-29
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A television signal processing system characterized by coding operation which comprises inverting synchronizing signal components of a television signal with reference to a pedestal thereof, expanding the synchronizing signal components to such an extent that they do not exceed a peak value of a video signal component and reducing horizontal synchronizing signals so as to leave one per several lines.

Inventors

  • 👤 Hiroshi Osaka
  • 👤 Akira Honma

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 22:34
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/16; H04N7/167; H04N7/171; H04N7/1713

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 290 words
A television processing system in a wireless pay-television system wherein a television signal is encoded by an encoder, the coded signal is transmitted to subscribers' ends, and the coded signal received at each of the subscribers' ends is decoded into an ordinary television signal by a decoder, which system is characterized in that said encoder processes and encodes the television signal by inverting a synchronizing signal component thereof with reference to a pedestal level and expanding said component to an extent not exceeding a peak value of a video signal component and by reducing the number of horizontal synchronizing signal components so that each of the horizontal synchronizing signal components may correspond to plural lines; said decoder including: a horizontal synchronizing signal extracting circuit adapted to be driven by the coded television signal for generating a signal having the same period as a horizontal synchronizing signal; a vertical synchronizing signal extracting circuit adapted to be driven by the coded television signal for generating a signal having the same period as a vertical synchronizing signal; a PLL circuit for obtaining a signal having the same frequency and the same phase as the horizontal synchronizing signal component from an output from said horizontal synchronizing signal extracting circuit; a switching signal generating circuit adapted to be driven by an output from said PLL circuit and the output from said vertical synchronizing signal extracting circuit for producing a switching signal; a synchronous reproducing circuit adapted to be driven by the output from said vertical synchronizing signal extracting circuit and the output from said PLL circuit; and a television signal switching circuit adapted to be driven by the switching signal for selectively outputting the coded television signal or an output from said synchronous reproducing circuit.
Claim 2
Dependent Claim 290 words
A television processing system in a wireless pay-television system wherein a television signal is encoded by an encoder, the coded signal is transmitted to subscribers' ends, and the coded signal received at each of the subscribers' ends is decoded into an ordinary television signal by a decoder, which system is characterized in that said encoder processes and encodes the television signal by inverting a synchronizing signal component thereof with reference to a pedestal level and expanding said component to an extent not exceeding a peak value of a video signal component and by reducing the number of horizontal synchronizing signal components so that each of the horizontal synchronizing signal components may correspond to plural lines; said decoder including: a horizontal synchronizing signal extracting circuit adapted to be driven by the coded television signal for generating a signal having the same period as a horizontal synchronizing signal; a vertical synchronizing signal extracting circuit adapted to be driven by the coded television signal for generating a signal having the same period as a vertical synchronizing signal; a PLL circuit for obtaining a signal having the same frequency and the same phase as the horizontal synchronizing signal component from an output from said horizontal synchronizing signal extracting circuit; a switching signal generating circuit adapted to be driven by an output from said PLL circuit and the output from said vertical synchronizing signal extracting circuit for producing a switching signal; a synchronous reproducing circuit adapted to be driven by the output from said vertical synchronizing signal extracting circuit and the output from said PLL circuit; and a television signal switching circuit adapted to be driven by the switching signal for selectively outputting the coded television signal or an output from said synchronous reproducing circuit.
Claim 3
Dependent Claim 29 words
A system according to claim 1, wherein said horizontal synchronizing signal extracting circuit includes a monostable multivibrator having no retriggerable function, to which the coded television signal is inputted.
Claim 4
Dependent Claim 140 words
A system according to claim 1, wherein said vertical synchronizing signal extracting circuit includes a first monostable multivibrator adapted to be triggered by the coded television signal, an inverter for inverting the coded television signal, a second monostable multivibrator adapted to be triggered by an output from said inverter; a first and a second differentiating circuit for differentiating outputs from the first and the second monostable multivibrators, respectively, a first AND gate into which an output from said first differentiating circuit and the coded television signal are inputted, a second AND gate into which an output from said second differentiating circuit and the output from said inverter are inputted, and a shift register which receives, at a clock input thereof, an output from said first AND gate and, at a reset input thereof, an output from said second AND gate.

References Cited (Backward Citations)

US2755333A Cited
US3439113A Cited
US3485941A Cited
US4095258A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-06-27 1986-12-27 1987-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-06-27 1990-12-27 1991-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-06-27 1994-12-27 1995-06-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag