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Patent US4389915A successfully refreshed from Google Patents.
US4389915A
Expired / Lapsed
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Musical instrument including electronic sound reverberation
Assignee: Marmon Co
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Filing: 1980-12-18
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Granted: 1983-06-28
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Expires: 2000-12-18
Abstract
Abstract An electronic reverberation system for use in an electronic musical instrument comprises a random access memory wherein two or more time delay channels are defined by address allocation in a controller circuit. An input analog signal is converted to digital signals by an analog-to-digital converter and the digital signals are processed by the controller into the time delay channels. The channels defined in the random access memory are of differing lengths which can be changed by switch settings. The controller sequentially retrieves stored digital data words from the random access memory channels in seriatum and couples each data word to a digital-to-analog converter. The analog output signal from the digital-to-analog converter is delayed in time by varying amounts due to the length of the channels in the random access memory. A portion of the delayed analog output signal contained in each channel is mixed with the input analog signal to produce a combined signal. The combined signal is converted to a digital data word which is stored back into the random access memory location from which the last digital data word was read. An enhanced reverberation effect is selectively achieved by switchably connecting a low frequency signal on the order of two hertz as an auxiliary input to be mixed with the input analog and delayed analog signals.
Inventors
- 👤 Angelo A. Bione
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:02
CPC Classifications
G; G10; G10H; G10H1/00; G10H1/0091; G10H2210/00; G10H2210/155; G10H2210/265; G10H2210/281; Y; Y10; Y10S; Y10S84/00; Y10S84/04; Y10S84/26
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
494 words
An electronic musical instrument having circuitry for generating a tone signal representative of a musical tone and a reverberation circuit for receiving said tone signal and producing a reverberated tone signal, said reverberation circuit comprising: first converter means receiving an analog input and providing a digital data word output; a random access memory receiving said digital data word output from said first converter means, providing a digital output signal and having a plurality of addressable memory locations froming at least a first channel and a second channel, each of said channels being separate and individual from said other channels and each comprising a different number of memory locations, each of said memory locations stores a digital data word output from said first converter; second converter means receiving said digital output signal from said random access memory and providing an analog delay output; addressing means comprising at least first and second counter circuits, said first counter circuit generating first address signals connected to said random access memory and defining said first separate and individual channel in said random access memory and said second counter circuit generating second address signals connected to said random access memory and defining said second separate and individual channel in said random access memory; first control means having a first control output signal connected to said second converter means for transferring a data word from a predetermined memory location in said random access memory to said second converter whereby said analog delay signal output is generated by said second converter in response to said data word; a mixer circuit for receiving said analog delay signal of said second converter and said tone signal and combining a portion of said analog delay signal of said second converter with said tone signal and providing a mixed signal as said analog input to said first converter; second control means having a second control output signal connected to said first converter for enabling said first converter to generate said digital data word output in response to said mixed signal; third control means having a third control output signal connected to said random access memory for transferring said digital data word generated in response to said mixed signal to said input of said random access memory and into said predetermined memory location from which the original digital data was transferred by said first control means; Sequencer means having a plurality of sequence output signals at least one of which is connected to each of said first, second and third control means and said addressing means for providing data words from said random access memory with one individual word being transferred from each of said separate and individual channels in repeated channel sequence and with each of said individual data words being transferred from each of said separate and individual channels sequentially; and an output circuit for receiving, filtering and intergrating said analog delay signal from said second converter means and for generating said reverberated tone signal.
Claim 2
Dependent Claim
494 words
An electronic musical instrument having circuitry for generating a tone signal representative of a musical tone and a reverberation circuit for receiving said tone signal and producing a reverberated tone signal, said reverberation circuit comprising: first converter means receiving an analog input and providing a digital data word output; a random access memory receiving said digital data word output from said first converter means, providing a digital output signal and having a plurality of addressable memory locations froming at least a first channel and a second channel, each of said channels being separate and individual from said other channels and each comprising a different number of memory locations, each of said memory locations stores a digital data word output from said first converter; second converter means receiving said digital output signal from said random access memory and providing an analog delay output; addressing means comprising at least first and second counter circuits, said first counter circuit generating first address signals connected to said random access memory and defining said first separate and individual channel in said random access memory and said second counter circuit generating second address signals connected to said random access memory and defining said second separate and individual channel in said random access memory; first control means having a first control output signal connected to said second converter means for transferring a data word from a predetermined memory location in said random access memory to said second converter whereby said analog delay signal output is generated by said second converter in response to said data word; a mixer circuit for receiving said analog delay signal of said second converter and said tone signal and combining a portion of said analog delay signal of said second converter with said tone signal and providing a mixed signal as said analog input to said first converter; second control means having a second control output signal connected to said first converter for enabling said first converter to generate said digital data word output in response to said mixed signal; third control means having a third control output signal connected to said random access memory for transferring said digital data word generated in response to said mixed signal to said input of said random access memory and into said predetermined memory location from which the original digital data was transferred by said first control means; Sequencer means having a plurality of sequence output signals at least one of which is connected to each of said first, second and third control means and said addressing means for providing data words from said random access memory with one individual word being transferred from each of said separate and individual channels in repeated channel sequence and with each of said individual data words being transferred from each of said separate and individual channels sequentially; and an output circuit for receiving, filtering and intergrating said analog delay signal from said second converter means and for generating said reverberated tone signal.
Claim 3
Dependent Claim
100 words
The apparatus of claim 1 wherein said sequencer means comprises: a source of clock signals; and a ring counter circuit for repetitively generating sequence output signals in response to said clock signals, said sequence signals occur in groups of three with each group of three corresponding to one of said channels; and, said first, second and third control means being responsive to said sequence signals and each of said counter circuits of said addressing means bring responsive to selected ones of said sequence output signals to increment their respective address signals to the next memory location in the corresponding channels.
Claim 4
Dependent Claim
56 words
The apparatus of claim 1 further comprising a signal generator having a reverberation enhancement output signal which is unrelated to said tone signal, said reverberation enhancement output signal being connected with said mixer and combined with said tone signal and a portion of said analog delay signal by said mixer for enhancing said reverberated tone signal.
Claim 5
Dependent Claim
16 words
The apparatus of claim 3 wherein said enhancement signal is a low frequency sine wave signal.
Claim 6
Dependent Claim
17 words
The apparatus of claim 3 wherein said enhancement signal is about a 2 hertz sine wave signal.
Claim 7
Dependent Claim
404 words
A process for producing a reverberated tone signal in an electronic musical instrument having circuitry for generating a tone signal representative of a musical tone, comprising the steps of: (A) defining at least first and second separate and individual channels in a digital storage device by assigning different numbers of storage locations in said storage device to said separate and individual channels; (B) reading a digital data word at a defined storage location identified by a first channel storage location indicator in said digital storage device corresponding to the first one of said separate and individual channels; (C) passing the stored data word to a digital-to-analog converter; (D) generating an analog delay signal in response to said data word; (E) passing said analog delay signal through a filter circuit to generate a reverberated tone signal; (F) combining said analog delay signal with said tone signal to form a combined tone signal; (G) transferring said combined tone signal to an analog-to-digital converter; (H) generating a digital data word in response to said combined tone signal; (I) storing said digital data word generated in response to said combined tone signal into the digital storage device at said storage location previously read; (J) advancing said first channel storage location indicator to the storage location which corresponds to the next sequential storage location for said first one of said separate and individual channels; (K) reading a digital data word at a defined storage location identified by a second channel storage location indicator in said digital storage device corresponding to the second one of said separate and individual channels; (L) passing the stored data word to a digital-to-analog converter; (M) generating an analog delay signal in response to said data word; (N) passing said analog delay signal through a filter circuit to generate a reverberated tone signal; (O) combining said analog delay signal with said tone signal to form a combined tone signal; (P) transferring said combined tone signal to an analog-to-digital converter; (Q) generating a digital data word in response to said combined tone signal; (R) storing said digital data word generated in response to said combined tone signal into the digital storage device at said storage location previously read; (S) advancing said second channel storage location indicator to the storage location which corresponds to the next sequential storage location for said second one of said separate and individual channels; and, (T) repetitively performing steps (B) through (S).
Claim 8
Dependent Claim
404 words
A process for producing a reverberated tone signal in an electronic musical instrument having circuitry for generating a tone signal representative of a musical tone, comprising the steps of: (A) defining at least first and second separate and individual channels in a digital storage device by assigning different numbers of storage locations in said storage device to said separate and individual channels; (B) reading a digital data word at a defined storage location identified by a first channel storage location indicator in said digital storage device corresponding to the first one of said separate and individual channels; (C) passing the stored data word to a digital-to-analog converter; (D) generating an analog delay signal in response to said data word; (E) passing said analog delay signal through a filter circuit to generate a reverberated tone signal; (F) combining said analog delay signal with said tone signal to form a combined tone signal; (G) transferring said combined tone signal to an analog-to-digital converter; (H) generating a digital data word in response to said combined tone signal; (I) storing said digital data word generated in response to said combined tone signal into the digital storage device at said storage location previously read; (J) advancing said first channel storage location indicator to the storage location which corresponds to the next sequential storage location for said first one of said separate and individual channels; (K) reading a digital data word at a defined storage location identified by a second channel storage location indicator in said digital storage device corresponding to the second one of said separate and individual channels; (L) passing the stored data word to a digital-to-analog converter; (M) generating an analog delay signal in response to said data word; (N) passing said analog delay signal through a filter circuit to generate a reverberated tone signal; (O) combining said analog delay signal with said tone signal to form a combined tone signal; (P) transferring said combined tone signal to an analog-to-digital converter; (Q) generating a digital data word in response to said combined tone signal; (R) storing said digital data word generated in response to said combined tone signal into the digital storage device at said storage location previously read; (S) advancing said second channel storage location indicator to the storage location which corresponds to the next sequential storage location for said second one of said separate and individual channels; and, (T) repetitively performing steps (B) through (S).
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-06-27 | 1986-12-27 | 1987-06-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-06-27 | 1990-12-27 | 1991-06-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-06-27 | 1994-12-27 | 1995-06-28 | $7700.00 | Window Closed / Lapsed |