US4384357A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Self-synchronization circuit for a FFSK or MSK demodulator
Assignee: Canada Minister of Communications
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Filing: 1981-04-03
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Granted: 1983-05-17
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Expires: 2001-04-03
Abstract
Abstract The self-synchronization circuit splits the incoming signal into two circuit paths where the signals are frequency shifted by a frequency signal equal to the carrier frequency so as to provide an in-phase signal in one circuit path and a quadrature signal in the other circuit path. The frequency shifting circuit includes at least a controllable oscillator. The output of a first multiplier which multiplies the in-phase and quadrature signals, is fed to a clock recovery circuit which determines the clock frequency. A second multiplier multiplies the output of the first multiplier with the clock recovery circuit output to provide a signal which controls the controllable oscillator. In addition, a frequency discriminator utilizes the in-phase and quadrature signals to initially coarse control the controllable oscillator frequency. The frequency shifting signals may be obtained from the controllable oscillator feeding phase shifting circuits, or they may be obtained from a combined circuit including a fixed oscillator with phase shifting circuits together with the controllable oscillator and appropriate mixing circuits.
Inventors
- 👤 Rudi deBuda
- 👤 Charles E. Jagger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 04:16
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L7/113; H04L27/0014; H04L2027/0024; H04L2027/0026; H04L2027/003; H04L2027/0044; H04L2027/0053; H04L2027/0057
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
144 words
In a demodulating receiver, a self-synchronization circuit for generating a carrier reference signal from an incoming Fast FSK or MSK signal comrising: first means for splitting the incoming signal into two circuit paths; second means for frequency shifting the incoming signal in each circuit path by a frequency signal substantially equal to the carrier frequency to provide an in-phase signal along one circuit path and a quadrature phase signal along the other circuit path, the frequency shifting means having an oscillator circuit controllable in frequency and phase; first multiplier means for multiplying the in-phase and quadrature signals; clock recovery circuit means for determining the clock frequency from the output of the first multiplier means; and second multiplier means for multiplying the output of the first multiplier means and the clock recovery circuit means for providing a carrier phase signal to the controllable oscillator circuit.
Claim 2
Dependent Claim
144 words
In a demodulating receiver, a self-synchronization circuit for generating a carrier reference signal from an incoming Fast FSK or MSK signal comrising: first means for splitting the incoming signal into two circuit paths; second means for frequency shifting the incoming signal in each circuit path by a frequency signal substantially equal to the carrier frequency to provide an in-phase signal along one circuit path and a quadrature phase signal along the other circuit path, the frequency shifting means having an oscillator circuit controllable in frequency and phase; first multiplier means for multiplying the in-phase and quadrature signals; clock recovery circuit means for determining the clock frequency from the output of the first multiplier means; and second multiplier means for multiplying the output of the first multiplier means and the clock recovery circuit means for providing a carrier phase signal to the controllable oscillator circuit.
Claim 3
Dependent Claim
29 words
A self-synchronization circuit as claimed in claim 1 which further includes a frequency discriminator means controlled by the in-phase and quadrature signals for initially controlling the oscillator circuit frequency.
Claim 4
Dependent Claim
124 words
A self-synchronization circuit as claimed in claims 1 or 2 wherein the second means includes third mixer means in the one circuit path and fourth mixer means in the other circuit path, the third mixer means having a first input connected to the first means and an output connected to the first multiplier means, the fourth mixer means having a first input connected to the first means and an output connected to the multiplier means, and means for providing signals from the controllable oscillator circuit to a second input of the third mixer means and a second input of the fourth mixer means wherein the signal to the third mixer means is shifted 90° with respect to the signal to the fourth mixer means.
Claim 5
Dependent Claim
203 words
A self-synchronization circuit as claimed in claims 1 or 2 wherein the second means includes: third mixer means in the one circuit path and fourth mixer means in the other circuit path, the third mixer means having a first input and a second input, and an output connected to the first mixer means, the fourth mixer means having a first input and a second input, and output connected to the first mixer means; and means for providing signals from the controllable oscillator circuit to the second input of the third mixer means and the second input of the fourth mixer means; fifth mixer means having a first input connected to the first means and an output connected to the first input of the third mixer means, and sixth mixer means having a first input connected to the first means and an output connected to the first input of the fourth mixer means; and fixed oscillator means having a frequency greater than the carrier frequency for providing a signal to a second input of the fifth mixer means and a signal to a second input of the sixth mixer means shifted by 90° with respect to the signal provided to the fifth mixer means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-05-16 | 1986-11-15 | 1987-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-05-16 | 1990-11-15 | 1991-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-05-16 | 1994-11-15 | 1995-05-17 | $7700.00 | Window Closed / Lapsed |