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US4384276A Expired / Lapsed US ⏱️ 0.0 years remaining

Capacitive DAC to filter interface circuit

Assignee: Motorola Solutions Inc
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Filing: 1981-05-08
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Granted: 1983-05-17
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Expires: 2001-05-08
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Abstract

Abstract An operational amplifier capable of selectively performing a variety of circuit functions is provided. A single operational amplifier utilizes switched capacitors for sampling and holding an input signal, for establishing a low frequency pole, for applying the sample to an output capacitance to charge the capacitance and for comparing the input signal with a reference. The multi-function circuit provides a large savings in circuit area and permits versatility of circuit applications. One embodiment of the invention is to utilize a companding DAC having a capacitor array which may be used as the output capacitance of the operational amplifier circuit. The DAC provided utilizes an R ladder DAC coupled directly to a C DAC and has a switching structure that is simpler than comparable prior art circuits. The DAC is asynchronous and has programmable A- and Mu-255 law PCM conversion capability. Coupled directly to the C DAC is an operational amplifier receive filter circuit which utilizes the C DAC as an input capacitor thereby eliminating the need for a buffer amplifier and allowing the DAC to be used for both analog to digital and digital to analog conversion.

Inventors

  • 👤 Stephen H. Kelley
  • 👤 Richard W. Ulmer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 16:38
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/02; H03M1/12; H03M1/14; H03M1/16; H03M1/66; H03M1/74

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 159 words
In combination: capacitive DAC means for capacitively coupling a charge to an output portion thereof in proportion to a voltage coupled to an input portion thereof; input switching means for coupling the input portion of the capacitive DAC means to a first reference voltage in response to a first enable signal; filter means for providing an output signal on an output portion thereof at a voltage related to the charge coupled to an input portion thereof; output switching means for coupling the output portion of the capacitive DAC means to the input portion of the filter means in response to a second enable signal, and to a second reference voltage in response to a third enable signal, and clock generator means for sequentially providing the third enable signal during a discharge period, the second enable signal during a settling period, the first and second enable signals during a sample period, and the first enable signal during a hold period.
Claim 2
Dependent Claim 159 words
In combination: capacitive DAC means for capacitively coupling a charge to an output portion thereof in proportion to a voltage coupled to an input portion thereof; input switching means for coupling the input portion of the capacitive DAC means to a first reference voltage in response to a first enable signal; filter means for providing an output signal on an output portion thereof at a voltage related to the charge coupled to an input portion thereof; output switching means for coupling the output portion of the capacitive DAC means to the input portion of the filter means in response to a second enable signal, and to a second reference voltage in response to a third enable signal, and clock generator means for sequentially providing the third enable signal during a discharge period, the second enable signal during a settling period, the first and second enable signals during a sample period, and the first enable signal during a hold period.
Claim 3
Dependent Claim 91 words
The combination of claim 1 wherein the capacitive DAC means comprise: unswitched capacitance means having an input portion coupled to the second reference voltage, and an output portion coupled to the output portion of the capacitive DAC means; switched capacitance means having an input portion coupled to the input switching means, and an output portion coupled to the output portion of the capactive DAC means; and DAC switching means for coupling the input portion of the switched capacitance means to the second reference voltage in response to the third enable signal.
Claim 4
Dependent Claim 54 words
The combination of claims 1 or 2 wherein the filter means comprise: operational amplifier means having inverting and non-inverting inputs and an output; feedback capacitance means coupled between the inverting input and the output of the operational amplifier; and feedback resistance means coupled between the inverting input and the output of the operational amplifier.
Claim 5
Independent Claim 65 words
A method of decoding an encoded signal, comprising the steps of: charging said encoded signal onto capacitance means of a D/A converter to provide a charge related to said encoded signal; and coupling said charge directly to a filter which uses said capacitance means as an input capacitor, thereby eliminating the need to convert said charge to a voltage before said encoded signal is filtered.
Claim 6
Independent Claim 65 words
A method of decoding an encoded signal, comprising the steps of: charging said encoded signal onto capacitance means of a D/A converter to provide a charge related to said encoded signal; and coupling said charge directly to a filter which uses said capacitance means as an input capacitor, thereby eliminating the need to convert said charge to a voltage before said encoded signal is filtered.

References Cited (Backward Citations)

US4129863A Cited
US4200863A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-05-16 1986-11-15 1987-05-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-05-16 1990-11-15 1991-05-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-05-16 1994-11-15 1995-05-17 $7700.00 Window Closed / Lapsed

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