Automatic circuit identifier

Claim 2

Apparatus for identifying a circuit having a known pin configuration and an unknown transfer characteristic among said pin configuration comprising: a socket comprising a plurality of receptacles for holding said pin configuration; bidirectional port means electrically connected to said socket, said bidirectional port means being selectively operable for providing input drive, output loading, and power supply conditions among said plurality of receptacles; storage means for storing data corresponding to a plurality of input and output parameters for a plurality of circuits of known identity; operating means connected to said storage means and responsive to said data for operating said bidirectional port means to provide said input drive, said output loading, and said power supply conditions corresponding to said input and output parameters sequentially for each of said plurality of circuits of known identity; and testing means to control said operating means and to provide an identity signal in response to detection of said data corresponding to said input and said output parameters for one of said plurality of circuits of known identity.

Claim 3

Apparatus as recited in claim 1 wherein said bidirectional port means comprises a programmable input/output port with a plurality of inputs/outputs each connected to one of said plurality of receptacles, a data direction latch to control each said input/output and thereby render said input/output operative as an input and alternately operative as an output, and an output latch operatively connected to each said input/output when said input/output is rendered operative as an output.

Claim 4

Apparatus as recited in claim 2 wherein said operating means comprises a microcomputer including a data/address bus connected to said storage means for accessing said data; said data/address bus being further connected to said bidirectional port means and responsive to said data to load each said data direction latch and subsequently to load each said output latch for those said inputs/outputs rendered operative as outputs.

Claim 5

Apparatus for identifying a circuit having a known pin configuration and an unknown transfer characteristic among said pin configuration comprising: socket means comprising a plurality of receptacles for holding said pin configuration; memory means for storing a plurality of test procedures; operating means operatively connected to said memory means and selectively operable for sequentially providing, one at a time, a plurality of test conditions to said socket means in response to each of said plurality of test procedures; and identification means responsive to output supplied to said socket means by said circuit for providing a particular identification output in response to detection of a specific predetermined set of said outputs from said plurality of receptacles at said socket means in response to said plurality of test conditions corresponding to a particular test procedure.

Claim 6

Apparatus for identifying a circuit having a known pin configuration and an unknown transfer characteristic among said pin configuration comprising: socket means comprising a plurality of receptacles for holding said pin configuration; memory means for storing a plurality of test procedures; operating means operatively connected to said memory means and selectively operable for sequentially providing, one at a time, a plurality of test conditions to said socket means in response to each of said plurality of test procedures; and identification means responsive to output supplied to said socket means by said circuit for providing a particular identification output in response to detection of a specific predetermined set of said outputs from said plurality of receptacles at said socket means in response to said plurality of test conditions corresponding to a particular test procedure.

Claim 7

Apparatus for identifying and testing a circuit having a known pin configuration comprising: a socket comprising a plurality of receptacles for holding said pin configuration; a programmable bidirectional port including a plurality of inputs/outputs electrically connected to said plurality of receptacles, a plurality of three state buffers connected to said plurality of inputs/outputs for rendering said plurality of inputs/outputs selectively operable for providing input drive, output loading, and power supply conditions among said plurality of receptacles and a plurality of data direction latches controlling said buffers; storage means for storing data corresponding to a plurality of input and output parameters for a plurality of circuits of known identify; operating means comprising a microcomputer connected to said storage means and said programmable bidirectional port for sequentially accessing said data and in response thereto operating said plurality of data direction latches to provide said input drive, said output loading, and said power supply conditions corresponding to said input and output parameters sequentially for each of said plurality of circuits of known identity; and testing means to control said operating means and to provide an identity signal in response to detection of a set of said data corresponding to said input and said output parameters for one of said plurality of circuits of known identity.

Claim 8

Apparatus for identifying and testing a circuit having a known pin configuration comprising: a socket comprising a plurality of receptacles for holding said pin configuration; a programmable bidirectional port including a plurality of inputs/outputs electrically connected to said plurality of receptacles, a plurality of three state buffers connected to said plurality of inputs/outputs for rendering said plurality of inputs/outputs selectively operable for providing input drive, output loading, and power supply conditions among said plurality of receptacles and a plurality of data direction latches controlling said buffers; storage means for storing data corresponding to a plurality of input and output parameters for a plurality of circuits of known identify; operating means comprising a microcomputer connected to said storage means and said programmable bidirectional port for sequentially accessing said data and in response thereto operating said plurality of data direction latches to provide said input drive, said output loading, and said power supply conditions corresponding to said input and output parameters sequentially for each of said plurality of circuits of known identity; and testing means to control said operating means and to provide an identity signal in response to detection of a set of said data corresponding to said input and said output parameters for one of said plurality of circuits of known identity.