Patent JPS55146201A successfully refreshed from Google Patents.
Patent US1624156A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4380044A Expired / Lapsed US ⏱️ 0.0 years remaining

D.C. to d.c. converter with plural feedback loops

Assignee: Syngenta Ltd
•
Filing: 1980-10-03
•
Granted: 1983-04-12
•
Expires: 2000-10-03
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A d.c. to d.c. converter which produces from a low voltage battery supply a high voltage d.c. output. The converter comprises a step up transformer the primary of which receives current pulses under the control of an oscillator. For each current pulse, the current builds up steadily and is then abruptly cut off so as to induce a high voltage pulse in a secondary of the transformer. The high voltage pulses pass along a voltage multiplier to provide the high voltage d.c. output. Each high voltage pulse has associated with it a low voltage pulse in the primary which is used to control the rate of the oscillator. The oscillator is also controlled as a function of the peak current in the primary by a transistor, and the oscillator is further controlled to limit its maximum rate when the output current exceeds a given level, by means of a feedback loop.

Inventors

  • 👤 Andrew F. Parr

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 14:05
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/33507

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 281 words
A d.c. to d.c. converter for deriving from a relatively low voltage battery supply a relatively high voltage d.c. output, comprising: a step up transformer having means defining primary and secondary windings; oscillator means for producing an output which oscillates between first and second states; semiconductor switching means controlled by said oscillator output to switch on and off in response to said first and second states, respectively, said switching means being arranged to switch current flowing through the transformer primary in such a manner that upon switching on of the switching means the current builds up progressively and upon switching off of said switching means the current changes abruptly in a manner to induce a relatively high voltage pulse in said secondary winding and such that there is formed in said primary winding a relatively low flyback voltage pulse of a magnitude which is a function of the magnitude of said high voltage pulse; output means coupled to the secondary winding and arranged to derive said high voltage d.c. output from high voltage pulses induced in the secondary winding; first control means for controlling the frequency of oscillation of the oscillator in dependence upon the magnitude of said low flyback voltage pulse formed in the primary winding; second control means including sensing means for sensing the magnitude of the current building up in the primary; means for causing the oscillator output to change from said first to said second state when the current level sensed by said sensing means exceeds a given level; and third control means for sensing an abnormal load condition on said high voltage d.c. output and controlling the oscillation frequency of said oscillator means in accordance therewith.
Claim 2
Dependent Claim 281 words
A d.c. to d.c. converter for deriving from a relatively low voltage battery supply a relatively high voltage d.c. output, comprising: a step up transformer having means defining primary and secondary windings; oscillator means for producing an output which oscillates between first and second states; semiconductor switching means controlled by said oscillator output to switch on and off in response to said first and second states, respectively, said switching means being arranged to switch current flowing through the transformer primary in such a manner that upon switching on of the switching means the current builds up progressively and upon switching off of said switching means the current changes abruptly in a manner to induce a relatively high voltage pulse in said secondary winding and such that there is formed in said primary winding a relatively low flyback voltage pulse of a magnitude which is a function of the magnitude of said high voltage pulse; output means coupled to the secondary winding and arranged to derive said high voltage d.c. output from high voltage pulses induced in the secondary winding; first control means for controlling the frequency of oscillation of the oscillator in dependence upon the magnitude of said low flyback voltage pulse formed in the primary winding; second control means including sensing means for sensing the magnitude of the current building up in the primary; means for causing the oscillator output to change from said first to said second state when the current level sensed by said sensing means exceeds a given level; and third control means for sensing an abnormal load condition on said high voltage d.c. output and controlling the oscillation frequency of said oscillator means in accordance therewith.
Claim 3
Dependent Claim 14 words
A converter according to claim 1 wherein said output means includes a voltage multiplier.
Claim 4
Dependent Claim 23 words
A converter according to claim 1 wherein said sensing means is arranged to control timing of oscillatory signals produced by the oscillator means.
Claim 5
Dependent Claim 41 words
A converter according to claim 1 wherein said third control means includes means to sense the output current of said output means and means to reduce the rate of operation of the oscillator if the output current exceeds a given level.
Claim 6
Dependent Claim 21 words
A converter according to claim 4 wherein the oscillator means comprises a pair of CMOS inverters and a time constant circuit.
Claim 7
Dependent Claim 42 words
A converter according to claim 1 wherein said first control means samples the peak value of said low flyback voltage pulse and to feed said sampled value to said oscillator means in such a manner as to control its rate of operation.
Claim 8
Dependent Claim 37 words
A converter according to claim 1 wherein said semiconductor switching means is connected in series with said primary winding, and wherein said oscillator means feeds a rectangular waveform to cause cyclic switching of said semiconductor switching means.
Claim 9
Dependent Claim 23 words
A converter according to claim 7 including a capacitor arranged to store electrical energy from said low voltage pulse in the primary winding.

References Cited (Backward Citations)

GB1231753A Cited
DE1933535A1 Cited
US3564393A Cited
GB1412985A Cited
US3916281A Cited
GB1472314A Cited
US4028596A Cited
US4131843A Cited
US4104714A Cited
US4281373A Cited
JPS5556469A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-04-11 1986-10-11 1987-04-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-04-11 1990-10-11 1991-04-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-04-11 1994-10-11 1995-04-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag