Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
297 words
An integrated circuit comprising: a substrate of semiconductor material having a major surface, a first surface adjacent region of said substrate containing a first part of said major surface, a second surface adjacent region of said substrate spaced apart from said first surface adjacent region, said second surface adjacent region containing a second part of said major surface, a third surface adjacent region contiguous to said first surface adjacent region and said second surface adjacent region, said third surface adjacent region containing a third part of said major surface, a first plurality of thin layers of silicon dioxide, each thin layer overlying a respective first surface portion of said first surface adjacent region, a second plurality of thin layers of silicon dioxide, each thin layer overlying a respective first surface portion of said second surface adjacent region, a first thick layer of silicon dioxide overlying a second surface portion of said first surface adjacent region, a second thick layer of silicon dioxide overlying a second surface portion of said second surface adjacent region, a third thick layer of silicon dioxide overlying said third part of said major surface, the thickness of said third thick layer of silicon dioxide being substantially greater than the thickness of said first and second thick layers, a first plurality of functional cells formed in said first surface adjacent region, each overlying a respective first surface portion thereof, a second plurality of functional cells formed in said second surface adjacent region, each overlying a respective first surface portion thereof, a plurality of conductive lines interconnecting elements of the functional cells located in said first surface adjacent region with the elements of the functional cells located in said second surface adjacent region, each of said conductive lines insulatingly overlying said third surface adjacent region.
Claim 2
Dependent Claim
297 words
An integrated circuit comprising: a substrate of semiconductor material having a major surface, a first surface adjacent region of said substrate containing a first part of said major surface, a second surface adjacent region of said substrate spaced apart from said first surface adjacent region, said second surface adjacent region containing a second part of said major surface, a third surface adjacent region contiguous to said first surface adjacent region and said second surface adjacent region, said third surface adjacent region containing a third part of said major surface, a first plurality of thin layers of silicon dioxide, each thin layer overlying a respective first surface portion of said first surface adjacent region, a second plurality of thin layers of silicon dioxide, each thin layer overlying a respective first surface portion of said second surface adjacent region, a first thick layer of silicon dioxide overlying a second surface portion of said first surface adjacent region, a second thick layer of silicon dioxide overlying a second surface portion of said second surface adjacent region, a third thick layer of silicon dioxide overlying said third part of said major surface, the thickness of said third thick layer of silicon dioxide being substantially greater than the thickness of said first and second thick layers, a first plurality of functional cells formed in said first surface adjacent region, each overlying a respective first surface portion thereof, a second plurality of functional cells formed in said second surface adjacent region, each overlying a respective first surface portion thereof, a plurality of conductive lines interconnecting elements of the functional cells located in said first surface adjacent region with the elements of the functional cells located in said second surface adjacent region, each of said conductive lines insulatingly overlying said third surface adjacent region.