← Back to Patent Explorer
US4377899A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing Schottky field-effect transistors utilizing shadow masking

Assignee: Sumitomo Electric Industries Ltd
•
Filing: 1980-11-12
•
Granted: 1983-03-29
•
Expires: 2000-11-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for manufacturing a semiconductor transistor device, specifically a Schottky barrier gate field-effect transistor, having an excellent performance at high frequency due to an exceedingly short gate length. An electrically conductive active layer is formed on a semi-insulating semiconductor substrate. Two adjacent walls are formed on the adjacent layer, are made of resist material, and extended linearly parallel to one another. Ohmic electrode metal is then evaporated obliquely with respect to the vertical surfaces of the two walls to form an ohmic electrode layer on the active layer in areas except for that lying between the two walls. A layer of Schottky barrier metal is then deposited between the two walls, and then the two walls are removed to remove the layers of ohmic electrode metal and Schottky barrier metal on the two walls.

Inventors

  • 👤 Shunji Otani
  • 👤 Kenichi Kikuchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 01:03
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/80; H10D30/87

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 152 words
A semiconductor device manufacturing method comprising the steps of: forming an electrically conductive active semiconductor layer on a semi-insulating semiconductor substrate; forming two adjacent walls of masking material on said active layer extending linearly parallel to one another, each of said two walls comprising an upper portion and a lower portion between said upper portion and said active layer; vacuum evaporating ohmic electrode metal obliquely with respect to vertical surfaces of said two walls to form a layer of ohmic electrode metal on said active layer except for a region of said active layer between said two walls; removing said upper portions to remove said layer of ohmic electrode metal formed on each upper portion; depositing a layer of Schottky barrier metal on said region of said active layer between said two lower portions; and removing each lower portion to remove said layer of Schottky barrier metal formed on each lower portion.
Claim 2
Dependent Claim 152 words
A semiconductor device manufacturing method comprising the steps of: forming an electrically conductive active semiconductor layer on a semi-insulating semiconductor substrate; forming two adjacent walls of masking material on said active layer extending linearly parallel to one another, each of said two walls comprising an upper portion and a lower portion between said upper portion and said active layer; vacuum evaporating ohmic electrode metal obliquely with respect to vertical surfaces of said two walls to form a layer of ohmic electrode metal on said active layer except for a region of said active layer between said two walls; removing said upper portions to remove said layer of ohmic electrode metal formed on each upper portion; depositing a layer of Schottky barrier metal on said region of said active layer between said two lower portions; and removing each lower portion to remove said layer of Schottky barrier metal formed on each lower portion.
Claim 3
Dependent Claim 55 words
The method as claimed in claim 1, wherein said step of depositing said layer of Schottky barrier metal comprises vacuum evaporating Schottky barrier metal at an oblique angle with respect to said walls such that said Schottky barrier metal is deposited on less than the entire region of said active layer lying between said walls.
Claim 4
Dependent Claim 50 words
The method as claimed in claim 1, wherein prior to the step of depositing said layer of Schottky barrier metal, at least a portion of said region of said active layer is etched to form a depression into which said Schottky barrier metal is deposited to form a gate electrode.
Claim 5
Dependent Claim 28 words
The method as claimed in claim 1, in which the surface of said semiconductor active layer is mesa etched prior to the formation of said two adjacent walls.
Claim 6
Dependent Claim 16 words
The method as claimed in claim 1, wherein said upper and lower portions comprise different materials.
Claim 7
Dependent Claim 27 words
The method as claimed in claim 5, wherein each of said upper portions comprises a resist material and each of said lower portions comprises an insulating film.
Claim 8
Dependent Claim 29 words
The method as claimed in claim 1, further comprising the step of heating said layer of ohmic electrode metal prior to said step of depositing said Schottky barrier metal.
Claim 9
Dependent Claim 136 words
A semiconductor device manufacturing method comprising the steps of: forming an electrically conductive active semiconductor layer on a semi-insulating semiconductor substrate; forming two adjacent walls of masking material on said active layer which extend linearly parallel to one another each of said walls comprising a resist material portion and an insulating material portion serving as a spacer; vacuum-evaporating ohmic electrode metal obliquely with respect to vertical surfaces of said two walls to form a layer of ohmic electrode metal selectively on said active layer except for a region of said active layer between said two walls; depositing a layer of Schottky barrier metal on said region of said active layer between said two walls; and removing said two walls to remove said layers of ohmic electrode metal and Schottky barrier metal formed on said two walls.
Claim 10
Dependent Claim 136 words
A semiconductor device manufacturing method comprising the steps of: forming an electrically conductive active semiconductor layer on a semi-insulating semiconductor substrate; forming two adjacent walls of masking material on said active layer which extend linearly parallel to one another each of said walls comprising a resist material portion and an insulating material portion serving as a spacer; vacuum-evaporating ohmic electrode metal obliquely with respect to vertical surfaces of said two walls to form a layer of ohmic electrode metal selectively on said active layer except for a region of said active layer between said two walls; depositing a layer of Schottky barrier metal on said region of said active layer between said two walls; and removing said two walls to remove said layers of ohmic electrode metal and Schottky barrier metal formed on said two walls.

References Cited (Backward Citations)

US3387360A Cited
US3676732A Cited
US3994758A Cited
US3851379A Cited
US3912546A Cited
US4048646A Cited
US4265934A Cited
US4232439A Cited
US4222164A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-03-28 1986-09-27 1987-03-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-03-28 1990-09-27 1991-03-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-03-28 1994-09-27 1995-03-29 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag