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US4376664A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of producing a semiconductor device

Assignee: Fujitsu Ltd
•
Filing: 1980-05-30
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Granted: 1983-03-15
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Expires: 2000-05-30
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Abstract

Abstract In a case where a semiconductor device is produced comprising at least one semiconductor element, an isolation region surrounding the semiconductor element and a thick silicon oxide layer lying on and around the semiconductor element, the thick oxide layer is formed by thermal-oxidizing the epitaxial layer having a buried layer and, at the same time, the isolation region is formed in the epitaxial layer by heating for thermal oxidation. Prior to a step of introducing impurities into the epitaxial layer, the epitaxial layer is covered by an anti-oxidation masking layer, an insulating layer and a photo resist layer. Subsequent to the step of introducing impurities, the anti-oxidation masking layer is shaped into a pattern mask for the thermal-oxidation treatment.

Inventors

  • 👤 Osamu Hataishi
  • 👤 Yoshinobu Momma

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 01:29
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 300 words
A method of producing a semiconductor device comprising at least one bipolar transistor and an isolation region which are formed in an epitaxial layer formed on a semiconductor substrate having a buried layer, said method comprising, in sequence, the steps of: (A) forming a layer capable of masking against oxidation on said epitaxial layer, (B) forming an insulating layer on said anti-oxidation masking layer, (C) forming a patterned negative resist layer on said insulating layer, (D) selectively etching said insulating layer by using said negative resist layer as a mask, (E) introducing a first impurity into a first predetermined portion of said epitaxial layer corresponding to the isolation region by using a first patterned positive resist layer as a mask, (F) introducing a second impurity through said masking layer into a second predetermined portion of said epitaxial layer corresponding to a collector-connecting-region of the bipolar transistor by using a second patterned positive resist layer as a mask, (G) removing said positive resist mask, (H) forming a metal layer over the whole exposed surface, (I) removing said patterned negative resist layer and the portion of said metal layer thereon, (J) etching the remaining portion of the insulating layer and the portion of said anti-oxidation layer lying thereunder by using the remaining layer as a mask, (K) removing said remaining metal layer, (L) selectively thermal-oxidizing said epitaxial layer by using the remaining anti-oxidation masking layer as a pattern mask to form a thick oxide layer, while at the same time diffusing said introduced first and second impurities into said epitaxial layer to form said isolation region and said collector region in contact with said buried layer, respectively, and (M) forming a base region and an emitter region of the bipolar transistor in a portion of said epitaxial layer above said buried layer.
Claim 2
Independent Claim 300 words
A method of producing a semiconductor device comprising at least one bipolar transistor and an isolation region which are formed in an epitaxial layer formed on a semiconductor substrate having a buried layer, said method comprising, in sequence, the steps of: (A) forming a layer capable of masking against oxidation on said epitaxial layer, (B) forming an insulating layer on said anti-oxidation masking layer, (C) forming a patterned negative resist layer on said insulating layer, (D) selectively etching said insulating layer by using said negative resist layer as a mask, (E) introducing a first impurity into a first predetermined portion of said epitaxial layer corresponding to the isolation region by using a first patterned positive resist layer as a mask, (F) introducing a second impurity through said masking layer into a second predetermined portion of said epitaxial layer corresponding to a collector-connecting-region of the bipolar transistor by using a second patterned positive resist layer as a mask, (G) removing said positive resist mask, (H) forming a metal layer over the whole exposed surface, (I) removing said patterned negative resist layer and the portion of said metal layer thereon, (J) etching the remaining portion of the insulating layer and the portion of said anti-oxidation layer lying thereunder by using the remaining layer as a mask, (K) removing said remaining metal layer, (L) selectively thermal-oxidizing said epitaxial layer by using the remaining anti-oxidation masking layer as a pattern mask to form a thick oxide layer, while at the same time diffusing said introduced first and second impurities into said epitaxial layer to form said isolation region and said collector region in contact with said buried layer, respectively, and (M) forming a base region and an emitter region of the bipolar transistor in a portion of said epitaxial layer above said buried layer.
Claim 3
Dependent Claim 19 words
The method of claim 1, wherein said first impurity for said isolation region is introduced through said masking layer.
Claim 4
Dependent Claim 52 words
The method of claim 1, wherein said first impurity for said isolation region is directly introduced into said portion of said epitaxial layer, after a portion of said masking layer on said portion of the epitaxial layer is removed by etching by using said first patterned positive resist layer as a mask.
Claim 5
Dependent Claim 29 words
The method of claim 2 or 3, comprising the step of etching a portion of said epitaxial layer prior to said step (K) of removing the remaining metal layer.
Claim 6
Dependent Claim 29 words
The method of claim 3, comprising the step of etching a portion of said epitaxial layer prior to said step of introducing the first impurity for said isolation region.
Claim 7
Independent Claim 274 words
A method of producing a semiconductor device comprising at least one bipolar transistor and an isolation region which are formed in an epitaxial layer formed on a semiconductor substrate having a buried layer, said method comprising, in sequence, the steps of: (A) forming a layer capable of masking against oxidation on said epitaxial layer, (B) forming an insulating layer on said anti-oxidation masking layer, (C) forming a patterned negative resist layer on said insulating layer, (D) introducing a first impurity into a first predetermined portion of said epitaxial layer corresponding to the isolation region by using a first patterned positive resist layer as a mask, (E) introducing a second impurity through said insulating and masking layers into a second predetermined portion of said epitaxial layer corresponding to a collector-connecting-region of the bipolar transistor by using a second patterned positive resist layer as a mask, (F) etching the portion of said insulating layer which is covered with said patterned negative resist layer by using a reaction between the water content of said negative resist layer and hydrogen fluoride gas, (G) removing said negative resist layer, (H) etching said anti-oxidation masking layer by using the remaining insulating layer as a mask, (I) removing said remaining insulating layer, (J) selectively thermally oxidizing said epitaxial layer to form a thick oxide layer, while at the same time diffusing said introduced first and second impurities into said epitaxial layer to form said isolation region and said collector-connecting-region in contact with said buried layer, respectively, and (K) forming a base region and an emitter region of the bipolar transistor in a portion of said epitaxial layer above said buried layer.
Claim 8
Independent Claim 274 words
A method of producing a semiconductor device comprising at least one bipolar transistor and an isolation region which are formed in an epitaxial layer formed on a semiconductor substrate having a buried layer, said method comprising, in sequence, the steps of: (A) forming a layer capable of masking against oxidation on said epitaxial layer, (B) forming an insulating layer on said anti-oxidation masking layer, (C) forming a patterned negative resist layer on said insulating layer, (D) introducing a first impurity into a first predetermined portion of said epitaxial layer corresponding to the isolation region by using a first patterned positive resist layer as a mask, (E) introducing a second impurity through said insulating and masking layers into a second predetermined portion of said epitaxial layer corresponding to a collector-connecting-region of the bipolar transistor by using a second patterned positive resist layer as a mask, (F) etching the portion of said insulating layer which is covered with said patterned negative resist layer by using a reaction between the water content of said negative resist layer and hydrogen fluoride gas, (G) removing said negative resist layer, (H) etching said anti-oxidation masking layer by using the remaining insulating layer as a mask, (I) removing said remaining insulating layer, (J) selectively thermally oxidizing said epitaxial layer to form a thick oxide layer, while at the same time diffusing said introduced first and second impurities into said epitaxial layer to form said isolation region and said collector-connecting-region in contact with said buried layer, respectively, and (K) forming a base region and an emitter region of the bipolar transistor in a portion of said epitaxial layer above said buried layer.
Claim 9
Dependent Claim 21 words
The method of claim 6, wherein said first impurity for said isolation region is introduced through said insulating and masking layers.
Claim 10
Dependent Claim 46 words
The method of claim 6, wherein said first impurity for said isolation region is directly introduced into said portion of said epitaxial layer, after portions of said insulating and masking layers are removed by etching by using said first patterned positive resist layer as a mask.
Claim 11
Dependent Claim 28 words
The method of claim 6, further comprising the step of etching a portion of said epitaxial layer subsequent to said step (H) of etching said anti-oxidation masking layer.

References Cited (Backward Citations)

US3783047A Cited
US3911471A Cited
US3920483A Cited
US4004044A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-03-14 1986-09-13 1987-03-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-03-14 1990-09-13 1991-03-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-03-14 1994-09-13 1995-03-15 $7700.00 Window Closed / Lapsed

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