Eight bit standard connector bus for sixteen bit microcomputer using mirrored memory boards

Claim 1

A microcomputer system comprising: a processor having sixteen-bit bidirectional data terminals; at least two memory means each containing separate eight-bit unidirectional Data-In and Data-Out lines, each memory means containing a memory array with an input and an output and unidirectional coupling means connecting the array to the Data-In lines and to the Data-Out lines to transfer data to and from the array; connector means containing a bus with a plurality of conductor means to interconnect the processor and memory means, the connector means having separate eight-bit Data-In and Data-Out lines for connection to said lines on the memory means; said unidirectional coupling means on the memory means connecting the eight-bit Data-In and Data-Out lines to the input and output, respectively, of the memory array on both of the memory means, said unidirectional coupling means selectively connecting the eight-bit Data-In and Data-Out lines to the output and input, respectively, of the memory array contained in one of said memory means whereby coupling is in opposite directions on said one of the memory means relative to the other; and connecting means for the processor connecting the sixteen-bit bidirectional data terminals of the processor to the two separate eight-bit Data-In and Data-Out lines of the connector means, said processor including means for simultaneously transmitting or simultaneously receiving sixteen bits to or from said memory arrays by utilizing said Data-In and Data-Out lines as a sixteen bit bidirectional bus.

Claim 11

A method of using a 2 N bit processor with connector means having an N bit Data-In bus and an N bit Data-Out bus, where N is an integral power of two, comprising the steps of: connecting one memory to the connector means with the input to the memory array associated with such one memory coupled to the Data-In bus and the output from the memory array coupled to the Data-Out bus; connecting another memory to the connector means with the input to the memory array associated with such another memory coupled to the Data-Out bus and the output from the memory array coupled to the Data-In bus; accessing both said one memory and said another memory with the same address via a plurality of address conductors associated with said connector means and said one memory and said another memory; and connecting a 2 N bit processor to the connector means with the 2 N bidirectional data lines of the processor being connected to the N bit Data-In lines and N bit Data-Out lines by unidirectional controllable cross-connected buffers, said processor simultaneously transmitting or simultaneously receiving 2 N bits to or from said memory arrays by utilizing said Data-In and Data-Out lines as a 2 N bit bidirectional bus.

Claim 12

A method of using a 2 N bit processor with connector means having an N bit Data-In bus and an N bit Data-Out bus, where N is an integral power of two, comprising the steps of: connecting one memory to the connector means with the input to the memory array associated with such one memory coupled to the Data-In bus and the output from the memory array coupled to the Data-Out bus; connecting another memory to the connector means with the input to the memory array associated with such another memory coupled to the Data-Out bus and the output from the memory array coupled to the Data-In bus; accessing both said one memory and said another memory with the same address via a plurality of address conductors associated with said connector means and said one memory and said another memory; and connecting a 2 N bit processor to the connector means with the 2 N bidirectional data lines of the processor being connected to the N bit Data-In lines and N bit Data-Out lines by unidirectional controllable cross-connected buffers, said processor simultaneously transmitting or simultaneously receiving 2 N bits to or from said memory arrays by utilizing said Data-In and Data-Out lines as a 2 N bit bidirectional bus.