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US4375072A
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Self-calibrating overcurrent detector
Assignee: International Business Machines Corp
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Filing: 1981-03-30
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Granted: 1983-02-22
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Expires: 2001-03-30
Abstract
Abstract Circuit for detecting a fault current in an installation where the load (RL) varies. Total current (IS) is converted into a voltage (VS). During an initialization cycle, means such as counter (9), digital-to-analog converter (10), comparator (5), resistors (R1, R2) generate a voltage (VS) equal to VS at the end of the initialization cycle, and a threshold voltage VS=kVS. During operation, voltage VS is compared with threshold VD in order to provide a fault detection indication which is transmitted to the protection circuit by a logic circuit, that is, AND gate (17) and OR gate (19). During the initialization cycle, protection is obtained by comparing VS with a reference voltage in a comparator (7). This device is used to protect machines having an expandable configuration.
Inventors
- 👤 Anthony J. Rice
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:33
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/165; G01R19/16566; G01R19/16571; H; H02; H02H; H02H3/00; H02H3/006; H02H3/08
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
103 words
Self-calibrating overcurrent detector characterized in that it includes: means for generating a first voltage (VS) which is proportional to the current whose fault value is to be detected, means which are active during an initialization cycle for generating a second increasing voltage (VC) which, at the end of the initialization cycle, is equal to the first voltage and for deriving from said second voltage a threshold voltage (VD) such that VS=kVC, k being a numerical factor higher than 1, and first means for comparing the threshold voltage with the first voltage in order to provide a fault detection indication after the initialization cycle.
Claim 2
Dependent Claim
103 words
Self-calibrating overcurrent detector characterized in that it includes: means for generating a first voltage (VS) which is proportional to the current whose fault value is to be detected, means which are active during an initialization cycle for generating a second increasing voltage (VC) which, at the end of the initialization cycle, is equal to the first voltage and for deriving from said second voltage a threshold voltage (VD) such that VS=kVC, k being a numerical factor higher than 1, and first means for comparing the threshold voltage with the first voltage in order to provide a fault detection indication after the initialization cycle.
Claim 3
Dependent Claim
34 words
Circuit according to claim 1 characterized in that it includes second comparison means for comparing the first voltage to a reference voltage in order to provide a fault detection indication during the initialization cycle.
Claim 4
Dependent Claim
29 words
Circuit according to claim 1 or 2 characterized in that it includes means to prevent the first comparison means from generating the fault detection indication during the initialization cycle.
Claim 5
Dependent Claim
68 words
Circuit according to claim 3 characterized in that the means for generating the second voltage (VC) include: a counter provided with a counting input and a resetting input, means for applying to the counting input of the counter clock pulses during the initialization cycle, means for generating a count control signal, analog-to-digital converter whose input receives the output signals of the counter and which provides the threshold voltage.
Claim 6
Dependent Claim
70 words
Circuit according to claims 1 or 2 characterized in that the means for generating the second voltage (VC) include: a counter provided with a counting input and a resetting input, means for applying to the counting input of the counter clock pulses during the initialization cycle, means for generating a count control signal, analog-to-digital converter whose input receives the output signals of the counter and which provides the threshold voltage.
Claim 7
Dependent Claim
40 words
Circuit according to claim 5 characterized in that the means for generating the second voltage (VC) comprise two resistors mounted in series between the converter output and a second reference voltage, voltage VC being drawn at the common resistor point.
Claim 8
Dependent Claim
46 words
Circuit according to claim 6 characterized in that the means for generating the count control signal include third comparison means which compare the first voltage with the second voltage (VC) and provides the count control signal if said second voltage is lower than the first one.
Claim 9
Dependent Claim
60 words
Circuit according to claim 7 characterized in that it comprises an AND gate having three inputs, the first input receiving a signal which activates the gate during the initialization cycle and deactivates it during operation time, the second input receiving the clock signal, and the third input receiving the count control signal, and one output connected to the counter input.
Claim 10
Dependent Claim
78 words
Circuit according to claim 8 characterized in that the means for preventing the generation of the fault indication during the initialization cycle include a second AND gate having two inputs, the first one receiving a signal to deactivate the gate during the initialization cycle and to activate it during machine operation, the second input being connected to the output of the first comparison means, the output of said gate providing the fault detection indication during the initialization cycle.
Claim 11
Dependent Claim
54 words
Circuit according to claim 9 characterized in that it comprises an OR gate having two inputs, the first one receiving the fault detection indication provided by the second comparison means, the second one receiving the indication provided by the second AND gate and whose output generates a control signal to stop the power supply.
References Cited (Backward Citations)
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FR2344159A1
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-02-21 | 1986-08-23 | 1987-02-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-02-21 | 1990-08-23 | 1991-02-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-02-21 | 1994-08-23 | 1995-02-22 | $7700.00 | Window Closed / Lapsed |