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US4373204A Expired / Lapsed US ⏱️ 0.0 years remaining

Phase locked loop timing recovery circuit

Assignee: AT&T Inc
•
Filing: 1981-02-02
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Granted: 1983-02-08
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Expires: 2001-02-02
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Abstract

Abstract The phase of timing signals is compared with the phase of incoming digital signals to produce phase error signals and repeated phase corrections of the timing signals are made in accordance with the phase error signals. The phase corrections are initially delayed until phase error signals exceeding a predetermined magnitude persist for a predetermined interval of time. The corrections are removed without delay when the phase error signals are discontinued.

Inventors

  • 👤 Grant P. Brooks

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 02:43
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/033; H04L7/0331

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 105 words
A timing wave recovery circuit comprising: means for generating phase shiftable timing wave signals, means for developing analog phase error signals whose amplitudes define magnitudes of phase differences between the timing wave signals and input signals, timing means arranged to pass from an initial condition to an operated condition after an interval of time in response to a persistance of the phase error signals, means responsive to the operated condition of the timing means for repeatedly shifting the phase of the timing wave signals, and means responsive to discontinuance of the phase error signals for resetting the timing means without delay to the initial condition.
Claim 2
Dependent Claim 105 words
A timing wave recovery circuit comprising: means for generating phase shiftable timing wave signals, means for developing analog phase error signals whose amplitudes define magnitudes of phase differences between the timing wave signals and input signals, timing means arranged to pass from an initial condition to an operated condition after an interval of time in response to a persistance of the phase error signals, means responsive to the operated condition of the timing means for repeatedly shifting the phase of the timing wave signals, and means responsive to discontinuance of the phase error signals for resetting the timing means without delay to the initial condition.
Claim 3
Dependent Claim 33 words
A timing wave recovery circuit in accordance with claim 1 wherein the timing means is arranged to pass to the operated condition in response to phase error signals exceeding a predetermined threshold magnitude.
Claim 4
Dependent Claim 94 words
A timing wave recovery circuit in accordance with claim 2 wherein: the developing means includes means for developing phase error signals defining a lag error condition when the phase of the timing wave signals lags the phase of the input signals, the timing means includes a lag timing circuit arranged to pass to the operated condition in response to phase error signals defining the lag error condition, and the shifting means further includes means responsive to the operated condition of the lag timing circuit for repeatedly advancing the phase of the timing wave signals.
Claim 5
Dependent Claim 97 words
A timing wave recovery circuit in accordance with claims 1 or 3 wherein: the developing means includes further means for developing phase error signals defining a lead error condition when the phase of the timing wave signals leads the phase of the input signals, the timing means includes a lead timing circuit arranged to pass to the operated condition in response to phase error signals defining the lead error condition, and the shifting means includes additional means responsive to the operated condition of the lead timing circuit for repeatedly retarding the phase of the timing wave signals.

References Cited (Backward Citations)

US3141930A Cited
US3404230A Cited
US3488440A Cited
US3646269A Cited
US4216544A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-02-07 1986-08-09 1987-02-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-02-07 1990-08-09 1991-02-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-02-07 1994-08-09 1995-02-08 $7700.00 Window Closed / Lapsed

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