US4370067A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic timepiece with gain/loss adjustment
Assignee: Citizen Watch Co Ltd
•
Filing: 1980-05-06
•
Granted: 1983-01-25
•
Expires: 2000-05-06
Abstract
Abstract An electronic timepiece in which an operating state of a timepiece circuit is controlled by a control circuit composed of a counter responsive to clock pulses from the timepiece circuit, a digital/analog converter for converting a digital output signal from the counter to an analog output signal, a potentiometer adapted to generate an analog input signal, and a comparator for comparing the analog output signal and the analog input signal to generate an output signal which is applied to the counter to control the same by which a control signal is generated to control the operating state of the timepiece.
Inventors
- 👤 Ryoji Iwakura
- 👤 Tatsuo Nitta
- 👤 Kazutoshi Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 05:23
CPC Classifications
G; G04; G04G; G04G99/00; G04F; G04F5/00; G04F5/04; G04F5/06; G04G13/00; G04G13/02; G04G13/021; G04G13/023; G04G3/00; G04G3/02; G04G3/022; G04G9/00; G04G9/0023; G04G9/0029; G04G9/0047
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
240 words
An electronic timepiece comprising: a timepiece circuit including means for generating clock pulses and means for controlling the operational state of the timepiece; and a control circuit connected to the timepiece circuit for controlling said operational state and including a counter responsive to said clock pulses to provide a digital output signal, a digital/analog converter converting said digital output signal into an analog output signal, a potentiometer adapted to provide an analog input signal, a comparator for comprising said analog output signal and said analog input signal and producing an output signal when said analog output signal and said analog input signal coincide with one another, said control circuit being responsive to said output signal from said comparator to stop the operation thereof whereafter said digital output signal is applied to said operational controlling means as a control signal by which the operational state of said timepiece circuit is controlled and said control circuit further includes switching means for controlling the operation of each of said potentiometer, said digital/analog converter and said comparator; wherein said control signal comprises a plurality of digital output signals, and said timepiece circuit generates a plurality of clock signals; a pulse width modulation circuit including coincidence detection circuit for detecting a coincidence between said plurality of digital output signals and said plurality of clock signals to generate a coincidence signal; and means for generating a pulse width modulated signal in response to said coincidence signal.
Claim 2
Dependent Claim
240 words
An electronic timepiece comprising: a timepiece circuit including means for generating clock pulses and means for controlling the operational state of the timepiece; and a control circuit connected to the timepiece circuit for controlling said operational state and including a counter responsive to said clock pulses to provide a digital output signal, a digital/analog converter converting said digital output signal into an analog output signal, a potentiometer adapted to provide an analog input signal, a comparator for comprising said analog output signal and said analog input signal and producing an output signal when said analog output signal and said analog input signal coincide with one another, said control circuit being responsive to said output signal from said comparator to stop the operation thereof whereafter said digital output signal is applied to said operational controlling means as a control signal by which the operational state of said timepiece circuit is controlled and said control circuit further includes switching means for controlling the operation of each of said potentiometer, said digital/analog converter and said comparator; wherein said control signal comprises a plurality of digital output signals, and said timepiece circuit generates a plurality of clock signals; a pulse width modulation circuit including coincidence detection circuit for detecting a coincidence between said plurality of digital output signals and said plurality of clock signals to generate a coincidence signal; and means for generating a pulse width modulated signal in response to said coincidence signal.
Claim 3
Dependent Claim
26 words
An electronic timepiece according to claim 1, in which said timepiece circuit further includes means for generating intermittent signal by which said counter is intermittently activated.
Claim 4
Dependent Claim
35 words
An electronic timepiece according to claim 1, further comprising means for inhibiting the supply of said coincidence signal to said pulse width modulated signal generating means in response to the output signal from said comparator.
Claim 5
Dependent Claim
66 words
An electronic timepiece according to claims 1 or 3, in which said timepiece circuit also includes a liquid crystal display device, and said operating state controlling means comprises a display driver circuit responsive to said pulse width modulated signal to drive said liquid crystal display device so as to apply a driving voltage signal thereto for a time interval determined by said pulse width modulated signal.
Claim 6
Dependent Claim
34 words
An electronic timepiece according to claims 1 or 3, in which said timepiece circuit includes an alarm device, and said operating state controlling means comprises an alarm driver circuit for driving said alarm device.
Claim 7
Dependent Claim
42 words
An electronic timepiece according to claim 5, in which said alarm driver circuit includes means responsive to said pulse width modulated signal to vary the loudness of alarm tone generated by said alarm device in dependence on said pulse width modulated signal.
Claim 8
Dependent Claim
34 words
An electronic timepiece according to claim 5, in which said alarm driver circuit includes means responsive to said pulse width modulated signal for varying the length of alarm tone generated by said alarm device.
Claim 9
Dependent Claim
33 words
An electronic timepiece according to claim 5, in which said alarm driver includes means responsive to said pulse width modulated signal for varying the tone quality of alarm generated by said alarm device.
Claim 10
Dependent Claim
34 words
An electronic timepiece according to claim 5, in which said alarm driver circuit includes means responsive to said pulse width modulated signal for varying the frequency of alarm tone generated by said alarm device.
Claim 11
Dependent Claim
75 words
An electronic timepiece according to claim 1 or 3, in which said timepiece circuit includes an oscillator circuit providing an output frequency signal, and said operating state controlling means comprises temperature compensation circuit means for controlling said output frequency signal in dependence on ambient temperature, said temperature compensation circuit means being controlled in response to said pulse width modulated signal to allow a temperature compensation operation to be controlled by said temperature compensation circuit means.
References Cited (Backward Citations)
US3895486A
Cited
US3938316A
Cited
US3999370A
Cited
US4015208A
Cited
US4114363A
Cited
US4143362A
Cited
US4272840A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-01-24 | 1986-07-26 | 1987-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-01-24 | 1990-07-26 | 1991-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-01-24 | 1994-07-26 | 1995-01-25 | $7700.00 | Window Closed / Lapsed |