Low-frequency power amplifier

Claim 2

An LF power amplifier for amplifying an input LF signal, comprising: means for generating a first pulse width modulated pulse train having a predetermined frequency, each of the pulses of said first pulse train having a predetermined height and the width of each of said pulses of said first pulse train being modulated as a function of said input signal; means for generating a second pulse width modulated pulse train having said predetermined frequency, each of the pulses of said second pulse train having said predetermined height and the width of each of said pulses of said second pulse train being modulated as a function of said input signal; first and second switch stage means, said first and second switch stage means receiving said first and second pulse trains, respectively, and each amplifying the pulses of said pulse train which it receives; means for combining, in series, said first and second pulse trains after they have been amplified by said first and second switch stage means, respectively, to form a combined pulse train; and low pass filter means for filtering said combined pulse train.

Claim 3

The amplifier of claim 1, wherein the maximum width of each of said pulses after it has been modulated being such that when said first and second pulse trains are combined by said combining means the pulses of said combined pulse train do not overlap.

Claim 4

The amplifier of claim 1, wherein said means for generating said first and second pulse trains are for generating said first and second pulse trains simultaneously.

Claim 5

The amplifier of claim 1 or claim 3, wherein said means for generating said first and second pulse trains are for generating said first and second pulse trains continuously.

Claim 6

The amplifier of claim 1, wherein each pulse in said combined pulse train is representative of said input LF signal at a respective instant such that said combined pulse train is representative of said input LF signal.

Claim 7

The amplifier of claim 1 comprising a total of n means for generating n respective pulses width modulated pulse trains, n being an integer not less than 2, including said first and second pulse train generating means, for simultaneously generating n pulse trains, each of said n pulse trains including a plurality of pulses and having said predetermined frequency and each of said pulses having said predetermined height; each of said n pulse trains being width-modulated as a function of said input LF signal; and said amplifier further comprising a total of n switch stage means, including said first and second switch stage means, each of said n switch stage means receiving a respective one of said n pulse trains and amplifying the said pulse train which it receives.

Claim 8

The amplifier of claim 1, wherein said means for generating said first and second width-modulated pulse trains further comprises: pulse generator means for generating a first unmodulated pulse train having said predetermined frequency and consisting of pulses having said predetermined height and having a predetermined width; first phase shift circuit means for receiving said first unmodulated pulse train and phase-shifting it to produce a second unmodulated pulse train having said predetermined frequency and consisting of pulses having said predetermined height and said predetermined width and shifted in phase relative to said first unmodulated pulse train by a predetermined amount; and first and second modulator circuit means for receiving said first and second unmodulated pulse trains, respectively, and for pulse width modulating said input LF signal on them to generate said first and second pulse width modulated pulse trains, respectively.

Claim 9

The amplifier of claim 7, wherein said first phase shift circuit means phase-shifts said first unmodulated pulse train by 180° to generate said second unmodulated pulse train.

Claim 10

The amplifier of claim 7, wherein said means for generating said first and second width-modulated pulse trains further comprises a total of n means for generating n respective pulse width modulated pulse trains, n being an integer not less than 2, for simultaneously generating n pulse trains, said n pulse trains including said first and second pulse width modulated pulse trains; each of said n pulse trains including a plurality of pulses and having said predetermined frequency and each of said pulses having said predetermined height; said n pulse trains being width-modulated as a function of said input LF signal; and said amplifier further comprising a total of n switch stage means, including said first and second switch stage means, each of said n switch stage means receiving a respective one of said n pulse trains and amplifying the said pulse train which it receives.

Claim 11

The amplifier of claim 9, wherein said means for generating said pulse width-modulated pulse trains further comprises: a total of n-1 phase shift circuit means, including said first phase shift circuit means, said n-1 phase shift circuit means being connected in parallel with each other; each of said n-1 phase shift circuit means being for receiving said first unmodulated pulse train and for phase-shifting it a respective predetermined amount to produce n-1 additional unmodulated pulse trains having said predetermined frequency and each consisting of pulses having said predetermined height and said predetermined width; and a total of n modulator circuit means connected in parallel with each other and including said first and second modulator circuit means, each of said n modulator circuit means being for receiving a respective one of said n unmodulated pulse trains and pulse-width modulating said input LF signal thereon to generate said n pulse-width modulated pulse trains.

Claim 12

The amplifier of claim 10, wherein said n-1 phase shift circuit means are for phase-shifting said first unmodulated pulse train in such a manner that no two said n unmodulated pulse trains are in phase with each other and such that the difference in phase between any two of said n unmodulated pulse trains is an integral multiple of 360° /n.

Claim 13

The amplifier of claim 6 or claim 11, wherein n is an even integer.

Claim 14

The amplifier of claim 7 or claim 10, wherein each of said switch stage means comprises a switch element and a power transformer; said switch element being for actuating said power transformer responsive to a pulse of the said pulse train received by that said switch stage means, and said power transformer being for generating an amplified pulse responsive to being actuated by said switch element, said amplified pulse having the same width as said pulse responsive to which said switch element has actuated said power transformer.

Claim 15

The amplifier of claim 13, wherein each of said switch stage means comprises at least first and second said switch elements and wherein said power transformer has a primary winding having first and second ends; and said first and second switch elements each being for generating a respective signal and applying it to said first or second end of said primary winding of said power transformer, respectively.

Claim 16

The amplifier of claim 14, wherein each said switch stage means comprises a control circuit for controlling said switch elements responsive to the pulses of said pulse train which is received by said switch stage.

Claim 17

The amplifier of claim 14, wherein said switch stage means each comprise a respective control circuit including a respective additional transformer; each said additional transformer having a respective secondary winding corresponding to each switch element in that said switch stage means.

Claim 18

The amplifier of claim 14, wherein said at least two switch elements of each said switch stage means are connected in parallel with each other.

Claim 19

The amplifier of claim 14, wherein at least some of said switch elements are power semiconductors.

Claim 20

The amplifier of claim 17, wherein at least some of said switch elements are power semiconductors.

Claim 21

The amplifier of claim 18, wherein at least some of said switch elements are electron tubes.

Claim 22

The amplifier of claim 19, wherein at least some of switch elements are electron tubes.

Claim 23

The amplifier of claim 14, wherein at least some of switch elements are electron tubes.

Claim 24

The amplifier of claim 17, wherein at least some of switch elements are electron tubes.

Claim 25

The amplifier of claim 6 or claim 10, wherein each of said switch stage means has two outputs; and said amplifier further comprising a respective diode connecting said two outputs of each said switch stage means.

Claim 26

The amplifier of claim 24, further comprising additional diodes, each of which is connected in series with one of said outputs of a respective one of said switch stage means, said additional diodes connecting said switch stage means in the form of a cascade circuit.

Claim 27

The amplifier of claim 6 or claim 10, wherein said means for combining said amplified pulses to form said combined pulse train applies said combined pulse train to said low pass filter means.

Claim 28

The amplifier of claim 10, wherein said low pass filter means comprises n low pass filters, each of said n low pass filters filtering the output of a respective one of said n switch stage means, and wherein the outputs of said n low pass filters are combined by said means for combining said amplified pulses to form said combined pulse train.

Claim 29

The amplifier of claim 10, further comprising n additional switch stage means, each of said 2n switch stage means being connected in parallel with a respective other one of said 2n switch stage means.

Claim 30

The amplifier of claim 1, claim 6 or claim 10, wherein said amplifier generates an output signal which is applied to the high frequency power stage of an amplitude modulated transmitter.

Claim 31

An LF power amplifier for amplifying an input LF signal, comprising: means for generating a first pulse width modulated pulse train having a predetermined frequency, each of the pulses of said first pulse train having a predetermined height and the width of each of said pulses of said first pulse train being modulated as a function of said input signal; means for generating a second pulse width modulated pulse train having said predetermined frequency, each of the pulses of said second pulse train having said predetermined height and the width of each of said pulses of said second pulse train being modulated as a function of said input signal; first and second switch stage means, said first and second switch stage means receiving said first and second pulse trains, respectively, and each amplifying the pulses of said pulse train which it receives, each of said switch stage means having two outputs; means for combining said first and second pulse trains after they have been amplified by said first and second switch stage means, respectively, to form a combined pulse train, said means for combining including: (A) a respective diode connecting said two outputs of each said switch stage means, and (B) additional diodes, each of which is connected in series with one of said outputs of a respective one of said switch stage means, said additional diodes connecting said switch stage means in the form of a cascade circuit, and low pass filter means for filtering said combined pulse train.

Claim 32

An LF power amplifier for amplifying an input LF signal, comprising: means for generating a first pulse width modulated pulse train having a predetermined frequency, each of the pulses of said first pulse train having a predetermined height and the width of each of said pulses of said first pulse train being modulated as a function of said input signal; means for generating a second pulse width modulated pulse train having said predetermined frequency, each of the pulses of said second pulse train having said predetermined height and the width of each of said pulses of said second pulse train being modulated as a function of said input signal; first and second switch stage means, said first and second switch stage means receiving said first and second pulse trains, respectively, and each amplifying the pulses of said pulse train which it receives, each of said switch stage means having two outputs; means for combining said first and second pulse trains after they have been amplified by said first and second switch stage means, respectively, to form a combined pulse train, said means for combining including: (A) a respective diode connecting said two outputs of each said switch stage means, and (B) additional diodes, each of which is connected in series with one of said outputs of a respective one of said switch stage means, said additional diodes connecting said switch stage means in the form of a cascade circuit, and low pass filter means for filtering said combined pulse train.

Claim 33

The amplifier of claim 1 or claim 30 in which the input signal has both positive and negative polarity, said first pulse train being modulated as a function of both polarities of said input signal, and said second pulse train also being modulated as a function of both polarities of said input signal.

Claim 34

The amplifier of claim 1 or claim 30 further comprising means for supplying a D.C. operating voltage to said first and second switch stage means, in which said means for combining combines said first and second pulse trains so that said combined pulse train has a maximum voltage greater than said D.C. operating voltage.

Claim 35

The amplifier of claim 32 in which said first switch means has an input for receiving said first pulse train and said second switch means has an input for receiving said second pulse train, each of said switch means further comprising an output which is galvanically separated from said input.