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US4368479A Expired / Lapsed US ⏱️ 0.0 years remaining

Silicon barrier Josephson junction configuration

Assignee: United States Department of the Navy
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Filing: 1980-10-29
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Granted: 1983-01-11
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Expires: 2000-10-29
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Abstract

Abstract A planar, silicon barrier, Josephson junction and method of forming the junction which does not require expensive high-resolution, lithography techniques such as electron beam or x-ray. The method includes an etching mask-etch process which forms the basic structure configuration using a (110)-cut silicon wafer. Subsequent to the etching process the mask is removed and a superconducting film is deposited on the previously formed silicon surface to produce a single crystal silicon barrier with good electrical properties.

Inventors

  • 👤 Kenneth L. Davis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 01:11
CPC Classifications
H; H10; H10N; H10N60/00; H10N60/10; H10N60/12; Y; Y10; Y10S; Y10S505/00; Y10S505/825; Y10S505/873; Y10S505/874

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 58 words
A planar, silicon barrier, Josephson junction which comprises: a single-crystal silicon wafer; said silicon wafer including a barrier; said barrier being formed by oppositely disposed channels in the upper surface of said wafer on each side of said barrier; and a superconducting film laid on the bottom surface of each of said channels in contact with said barrier.
Claim 2
Dependent Claim 58 words
A planar, silicon barrier, Josephson junction which comprises: a single-crystal silicon wafer; said silicon wafer including a barrier; said barrier being formed by oppositely disposed channels in the upper surface of said wafer on each side of said barrier; and a superconducting film laid on the bottom surface of each of said channels in contact with said barrier.
Claim 3
Dependent Claim 26 words
A planar, silicon barrier, Josephson junction as claimed in claim 1 wherein: the thickness dimension between the channels forming said barrier is less than about 0.2μ.
Claim 4
Dependent Claim 29 words
A planar, silicon barrier, Josephson junction as claimed in claim 2 wherein: said single-crystal silicon wafer has an upper surface parallel with the (110) plane of said silicon wafer.
Claim 5
Dependent Claim 44 words
A planar, silicon barrier, Josephson junction as claimed in claim 3 wherein: said channels include vertical walls and wherein: the vertical walls of said channels are aligned along the directions in which (111) crystal planes intersect at right angles with said (110) crystal plane.
Claim 6
Dependent Claim 40 words
A planar, silicon barrier, Josephson junction as claimed in claim 4 further comprising: a layer of silicon nitride disposed upon said upper surface of said silicon wafer wherein said silicon nitride layer extends beyond the vertical walls of said channels.
Claim 7
Dependent Claim 18 words
A planar, silicon barrier, Josephson junction device as claimed in claim 5 wherein: said superconducting film is niobium.

References Cited (Backward Citations)

US4065742A Cited
US4253230A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-01-10 1986-07-12 1987-01-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-01-10 1990-07-12 1991-01-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-01-10 1994-07-12 1995-01-11 $7700.00 Window Closed / Lapsed

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