Signal-muting circuit for bridge amplifier

Claim 2

In a signal-muting circuit for a bridge amplifier having a potential source connected to two amplifying means each formed by connecting a non-reversible amplifier and a non-reversible buffer amplifier in series, an improvement characterized in that a switch is connected between the input terminals of the non-reversible buffer amplifiers as the final stage in each of said amplifying means so as to form a short-circuit whereby a signal is muted.

Claim 3

A signal-muting circuit according to claim 1 wherein thenon-reversible amplifiers respectively and the non-reversible buffer amplifiers respectively have the same voltage gain.

Claim 4

A signal-muting circuit according to claim 2 wherein each of said amplifier means has a feed-back resistor connected between the output terminal and the feed-back input terminal of each said amplifier means and wherein said feed-back resistors of each amplifying means are equal.

Claim 5

A signal-muting circuit according to claim 1 wherein the switch is formed by a first transistor whose emitter and collector are connected between the input terminals of the buffer amplifiers; a second transistor whose collector, emitter and base are respectively connected to the emitter, the collector and the base of the first transistor; a third transistor whose collector is connected through a first resistor to the bases of the first and the second transistors, whose emitter is connected to one of a positive and negative terminal of said potential source and whose base is connected through a second resistor to said one terminal of said potential source and a first mechanical switch which is connected through a third resistor between the base of the third transistor and the other of said positive or negative terminal of said potential source.

Claim 6

A signal-muting circuit according to claim 4 wherein the first mechanical switch is formed by a fourth transistor whose collector and emitter are connected between the third resistor and the other of the potential sources and a second mechanical switch connected through a fourth resistor between the base of the fourth transistor and one of the potential sources.

Claim 7

A signal-muting circuit according to claim 5 wherein a diode connected between the base and the emitter of the fourth transistor.

Claim 8

A signal-muting circuit according to any one of claim 4, 5, or 6 wherein the buffer amplifier is a push-pull amplifier.

Claim 9

A signal-muting circuit according to claim 4, 5, or 6 wherein a diode is connected between the base and the emitter of the first and second transistors respectively.

Claim 10

A signal-muting circuit according to claim 7 wherein a diode is connected between the base and the emitter of the first and the second transistors respectively.