US4366441A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal-muting circuit for bridge amplifier
Assignee: Mitsubishi Electric Corp
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Filing: 1980-08-07
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Granted: 1982-12-28
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Expires: 2000-08-07
Abstract
Abstract A signal-muting circuit, applied to a bridge amplifier comprises two amplifying means, performs signal-muting by shorting the input terminals of non-reversible buffer amplifiers forming the final stage of each amplifying means. Non-reversible amplifiers and said non-reversible buffer amplifiers in the amplifying means have the same voltage gain respectively.
Inventors
- 👤 Kiyomitsu Nishimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 03:23
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/34; H03F; H03F3/00; H03F3/30; H03F3/3081
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
70 words
In a signal-muting circuit for a bridge amplifier having a potential source connected to two amplifying means each formed by connecting a non-reversible amplifier and a non-reversible buffer amplifier in series, an improvement characterized in that a switch is connected between the input terminals of the non-reversible buffer amplifiers as the final stage in each of said amplifying means so as to form a short-circuit whereby a signal is muted.
Claim 2
Dependent Claim
70 words
In a signal-muting circuit for a bridge amplifier having a potential source connected to two amplifying means each formed by connecting a non-reversible amplifier and a non-reversible buffer amplifier in series, an improvement characterized in that a switch is connected between the input terminals of the non-reversible buffer amplifiers as the final stage in each of said amplifying means so as to form a short-circuit whereby a signal is muted.
Claim 3
Dependent Claim
22 words
A signal-muting circuit according to claim 1 wherein thenon-reversible amplifiers respectively and the non-reversible buffer amplifiers respectively have the same voltage gain.
Claim 4
Dependent Claim
43 words
A signal-muting circuit according to claim 2 wherein each of said amplifier means has a feed-back resistor connected between the output terminal and the feed-back input terminal of each said amplifier means and wherein said feed-back resistors of each amplifying means are equal.
Claim 5
Dependent Claim
139 words
A signal-muting circuit according to claim 1 wherein the switch is formed by a first transistor whose emitter and collector are connected between the input terminals of the buffer amplifiers; a second transistor whose collector, emitter and base are respectively connected to the emitter, the collector and the base of the first transistor; a third transistor whose collector is connected through a first resistor to the bases of the first and the second transistors, whose emitter is connected to one of a positive and negative terminal of said potential source and whose base is connected through a second resistor to said one terminal of said potential source and a first mechanical switch which is connected through a third resistor between the base of the third transistor and the other of said positive or negative terminal of said potential source.
Claim 6
Dependent Claim
58 words
A signal-muting circuit according to claim 4 wherein the first mechanical switch is formed by a fourth transistor whose collector and emitter are connected between the third resistor and the other of the potential sources and a second mechanical switch connected through a fourth resistor between the base of the fourth transistor and one of the potential sources.
Claim 7
Dependent Claim
21 words
A signal-muting circuit according to claim 5 wherein a diode connected between the base and the emitter of the fourth transistor.
Claim 8
Dependent Claim
21 words
A signal-muting circuit according to any one of claim 4, 5, or 6 wherein the buffer amplifier is a push-pull amplifier.
Claim 9
Dependent Claim
28 words
A signal-muting circuit according to claim 4, 5, or 6 wherein a diode is connected between the base and the emitter of the first and second transistors respectively.
Claim 10
Dependent Claim
26 words
A signal-muting circuit according to claim 7 wherein a diode is connected between the base and the emitter of the first and the second transistors respectively.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-12-27 | 1986-06-28 | 1986-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-12-27 | 1990-06-28 | 1990-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-12-27 | 1994-06-28 | 1994-12-28 | $7700.00 | Window Closed / Lapsed |