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Patent US4363050A successfully refreshed from Google Patents.
US4363050A
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Digitized audio record and playback system
Assignee: RCA Corp
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Filing: 1980-07-28
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Granted: 1982-12-07
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Expires: 2000-07-28
Abstract
Abstract A system for digitally processing an analog signal, such as an audio signal, for recording and playback. The system comprises means responsive to the analog signal to produce sequences of binary 1's for those portions thereof whose amplitude exceeds a given signal level and to produce sequences of binary 0's for those portions thereof whose amplitude is less than said given signal level, and encoding means responsive to each sequence in the order of their occurrence to form a digital word representing the number of bits in each sequence. Also provided are memory means for storing said digital words in said order of occurrence, and means responsive to the stored digital words, in said order of occurrence, to produce a two level signal whose first level represents said sequences of binary 1's and whose second level represents said sequences of binary 0's. Filtering means can be provided to filter the two level signal to produce an apporoximate reproduction of the original analog signal.
Inventors
- 👤 Andrew A. Modla
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:30
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/12; G11C; G11C7/00; G11C7/16; G11C2207/00; G11C2207/16
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
146 words
A system for processing an analog signal comprising: means responsive to said analog signal to produce sequences of binary 1's for those portions thereof whose amplitude is greater than a given signal level and to produce sequences of binary 0's for those portions thereof whose amplitude is less than said given signal level; first means responsive to each sequence, in the order of their occurrence, to form an N bit digital word of a fixed length and representing the number of bits in said each sequence; second means for sequentially storing said digital words as they occur to form a series of co-existent sequentially stored digital words; third means responsive to said sequentially stored digital words, in said order of occurrence, to produce a two level signal whose first level represents said sequences of binary 1's and whose second level represents said sequences of binary 0's.
Claim 2
Independent Claim
146 words
A system for processing an analog signal comprising: means responsive to said analog signal to produce sequences of binary 1's for those portions thereof whose amplitude is greater than a given signal level and to produce sequences of binary 0's for those portions thereof whose amplitude is less than said given signal level; first means responsive to each sequence, in the order of their occurrence, to form an N bit digital word of a fixed length and representing the number of bits in said each sequence; second means for sequentially storing said digital words as they occur to form a series of co-existent sequentially stored digital words; third means responsive to said sequentially stored digital words, in said order of occurrence, to produce a two level signal whose first level represents said sequences of binary 1's and whose second level represents said sequences of binary 0's.
Claim 3
Independent Claim
179 words
A system for processing an analog signal comprising: means for digitizing the continuous portions of said analog signal greater than a given signal level into uniformly spaced pulses of a first polarity and the continuous portions less than said given signal level into uniformly spaced pulses of a second polarity; means responsive to the pulses representing each continuous portion of said analog signal to form an N bit digital word of a fixed length and having a binary value equal to the number of pulses representing said each continuous portion; memory means for storing said digital words in the order of occurrence of the continuous portions represented thereby to form a series of co-existent sequentially stored digital words; means for reading said digital words from said memory means in said order of occurrence; and means responsive to said read-out digital words in said order of occurrence to produce a two level signal whose first and second levels correspond, respectively, to the portions of said digitized analog signal represented by said uniformly spaced pulses of said first and second polarity.
Claim 4
Independent Claim
179 words
A system for processing an analog signal comprising: means for digitizing the continuous portions of said analog signal greater than a given signal level into uniformly spaced pulses of a first polarity and the continuous portions less than said given signal level into uniformly spaced pulses of a second polarity; means responsive to the pulses representing each continuous portion of said analog signal to form an N bit digital word of a fixed length and having a binary value equal to the number of pulses representing said each continuous portion; memory means for storing said digital words in the order of occurrence of the continuous portions represented thereby to form a series of co-existent sequentially stored digital words; means for reading said digital words from said memory means in said order of occurrence; and means responsive to said read-out digital words in said order of occurrence to produce a two level signal whose first and second levels correspond, respectively, to the portions of said digitized analog signal represented by said uniformly spaced pulses of said first and second polarity.
Claim 5
Dependent Claim
145 words
A signal processing system comprising: means for digitizing those portions of said received signal exceeding a first given signal level into sequences of binary 1's and the remaining portions into sequences of binary 0's; means responsive to each sequence, in the order of their occurrence, to form a series of digital words each of the same fixed length and having a value representing the number of bits in said each sequence; memory means for storing said digital words to form a series of co-existent sequentially stored digital words; and means for reading from said memory means and for decoding said digital words, in said order of occurrence, to produce a signal in which the portions thereof derived from said digital words representing binary 1's exceed a second given signal level and in which the remaining portions thereof are less than said second given signal level.
Claim 6
Dependent Claim
145 words
A signal processing system comprising: means for digitizing those portions of said received signal exceeding a first given signal level into sequences of binary 1's and the remaining portions into sequences of binary 0's; means responsive to each sequence, in the order of their occurrence, to form a series of digital words each of the same fixed length and having a value representing the number of bits in said each sequence; memory means for storing said digital words to form a series of co-existent sequentially stored digital words; and means for reading from said memory means and for decoding said digital words, in said order of occurrence, to produce a signal in which the portions thereof derived from said digital words representing binary 1's exceed a second given signal level and in which the remaining portions thereof are less than said second given signal level.
Claim 7
Independent Claim
85 words
A system for processing a signal comprising: means responsive to said signal to produce sequences of binary 1's for those portions thereof whose amplitude exceeds a given signal level, and to produce sequences of binary 0's for the remaining portions; means responsive to each sequence to form a digital word of a fixed length and representing the number of bits in said each sequence; and means for storing said digital words in a known order to form a series of co-existent sequentially stored digital words.
Claim 8
Independent Claim
85 words
A system for processing a signal comprising: means responsive to said signal to produce sequences of binary 1's for those portions thereof whose amplitude exceeds a given signal level, and to produce sequences of binary 0's for the remaining portions; means responsive to each sequence to form a digital word of a fixed length and representing the number of bits in said each sequence; and means for storing said digital words in a known order to form a series of co-existent sequentially stored digital words.
Claim 9
Independent Claim
79 words
A method for processing a signal comprising the steps of: digitizing said signal to produce sequences of binary 1's for those portions thereof whose amplitude exceeds a given signal level and sequences of binary 0's for the remaining portions; generating, for each sequence, a digital word of a fixed length and representing the number of bits in said each sequence; and storing said digital words in a known order to form a series of co-existent sequentially stored digital words.
Claim 10
Independent Claim
79 words
A method for processing a signal comprising the steps of: digitizing said signal to produce sequences of binary 1's for those portions thereof whose amplitude exceeds a given signal level and sequences of binary 0's for the remaining portions; generating, for each sequence, a digital word of a fixed length and representing the number of bits in said each sequence; and storing said digital words in a known order to form a series of co-existent sequentially stored digital words.
Claim 11
Independent Claim
165 words
A method for processing an analog signal comprising the steps of: digitizing said analog signal to produce sequences of pulses of a first polarity for those portions thereof whose amplitude is greater than a given signal level and to produce sequences of pulses of the second polarity for those portions thereof whose amplitude is less than said given signal level; generating for each sequence, in their order of occurrence, a digital word of a fixed length and representing a number of pulses in said each sequence; storing said digital words to form a series of co-existent sequentially stored digital words; and reading out said digital words in their sequentially stored order; producing in response to said read-out digital words an analog signal whose amplitude exceeds a predetermined signal level during time periods corresponding to said sequences of pulses of said first polarity and whose amplitude is less than said predetermined signal level during time periods corresponding to said sequences of pulses of said second polarity.
Claim 12
Independent Claim
165 words
A method for processing an analog signal comprising the steps of: digitizing said analog signal to produce sequences of pulses of a first polarity for those portions thereof whose amplitude is greater than a given signal level and to produce sequences of pulses of the second polarity for those portions thereof whose amplitude is less than said given signal level; generating for each sequence, in their order of occurrence, a digital word of a fixed length and representing a number of pulses in said each sequence; storing said digital words to form a series of co-existent sequentially stored digital words; and reading out said digital words in their sequentially stored order; producing in response to said read-out digital words an analog signal whose amplitude exceeds a predetermined signal level during time periods corresponding to said sequences of pulses of said first polarity and whose amplitude is less than said predetermined signal level during time periods corresponding to said sequences of pulses of said second polarity.
Claim 13
Independent Claim
147 words
A method for processing an analog signal comprising the steps of: digitizing the portions of said analog signal greater than a given signal level into binary 1's and the portions less than said given signal into binary 0's; generating, in response to each portion of said analog signal a digital word of a fixed length and having a binary value equal to the number of bits in said each portion; storing said digital words into a memory in the order of occurrence of the portions represented thereby to form a series of co-existent sequentially stored digital words; reading said digital words from said memory in said order of occurrence; and decoding said read-out digital words in said order of occurrence to produce a two level signal whose first and second levels correspond, respectively, to the portions of said digitized analog signal comprising binary 1's and binary 0's.
Claim 14
Independent Claim
147 words
A method for processing an analog signal comprising the steps of: digitizing the portions of said analog signal greater than a given signal level into binary 1's and the portions less than said given signal into binary 0's; generating, in response to each portion of said analog signal a digital word of a fixed length and having a binary value equal to the number of bits in said each portion; storing said digital words into a memory in the order of occurrence of the portions represented thereby to form a series of co-existent sequentially stored digital words; reading said digital words from said memory in said order of occurrence; and decoding said read-out digital words in said order of occurrence to produce a two level signal whose first and second levels correspond, respectively, to the portions of said digitized analog signal comprising binary 1's and binary 0's.
Claim 15
Dependent Claim
120 words
A digitized audio playback system comprising: memory means having a plurality of word storage locations containing a plurality of digital words of equal binary length stored concurrently and sequentially therein in parallel manner and representing numerical count values equal to the number of binary 1's and binary 0's in alternate strings of binary 1's and binary 0's in a stream of bits; and means for reading and decoding said concurrent and sequentially stored equal length digital words, in said order of sequential parallel storing, to produce a signal in which the portions thereof derived from said digital words representing binary 1's exceed a given signal level and in which the remaining portions thereof are less than said given signal level.
Claim 16
Dependent Claim
120 words
A digitized audio playback system comprising: memory means having a plurality of word storage locations containing a plurality of digital words of equal binary length stored concurrently and sequentially therein in parallel manner and representing numerical count values equal to the number of binary 1's and binary 0's in alternate strings of binary 1's and binary 0's in a stream of bits; and means for reading and decoding said concurrent and sequentially stored equal length digital words, in said order of sequential parallel storing, to produce a signal in which the portions thereof derived from said digital words representing binary 1's exceed a given signal level and in which the remaining portions thereof are less than said given signal level.
Claim 17
Independent Claim
135 words
A method for processing a series of digital words each of the same length, concurrently and sequentially stored in parallel manner in a memory, and successively having numerical count values equal to the number of binary 1's and binary 0's in alternate strings of binary 1's and binary 0's in a stream of bits and comprising the steps of: reading out in parallel manner from said memory said equal length concurrent and sequentially stored digital words in their sequentially stored order; and producing in response to said read-out digital words in their sequentially read-out order an analog signal whose amplitude exceeds a predetermined signal level during time periods corresponding to said strings of binary 1's and whose amplitude is less than said predetermined signal level during time periods corresponding to said strings of binary 0's.
Claim 18
Independent Claim
135 words
A method for processing a series of digital words each of the same length, concurrently and sequentially stored in parallel manner in a memory, and successively having numerical count values equal to the number of binary 1's and binary 0's in alternate strings of binary 1's and binary 0's in a stream of bits and comprising the steps of: reading out in parallel manner from said memory said equal length concurrent and sequentially stored digital words in their sequentially stored order; and producing in response to said read-out digital words in their sequentially read-out order an analog signal whose amplitude exceeds a predetermined signal level during time periods corresponding to said strings of binary 1's and whose amplitude is less than said predetermined signal level during time periods corresponding to said strings of binary 0's.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-12-06 | 1986-06-07 | 1986-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-12-06 | 1990-06-07 | 1990-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-12-06 | 1994-06-07 | 1994-12-07 | $7700.00 | Window Closed / Lapsed |