Abstract A multilayer printed circuit board structure and a method for generating artwork masters for the manufacture thereof. The multilayer board comprises universal internal layers of predefined circuit patterns. The internal layers include power and ground planes, and for boards having high component and circuit density, one or two signal crossover layers with short, equal-length runs oriented transversely to the runs of an adjacent outermost signal layer. Electrical interconnections between layers of the circuit board are effected by interlayer conductors such as pins or plated-through holes at predefined locations. The artwork masters for the outermost layers are generated utilizing two degrees of layout precision. A universal layout master having interconnection pads and parallel circuit runs extending across the entire surface of the board is first prepared using a high degree of precision. The universal layout master is then superposed with other layout masters including a component matrix and utilized to generate a composite artwork master having relatively short circuit runs of a second degree of precision interconnecting the parallel runs and the pads. A tool for a unique outermost layer is then reproduced from the composite artwork master utilizing an artwork master of another layer to control interlayer registration.
In an artwork master for the manufacture of one layer in a multilayer printed circuit board: a plurality of parallel artwork traces corresponding to conductive traces on the one layer in the printed circuit board, said traces extending substantially across the artwork master; an array of artwork pads corresponding to conductive pads on the one layer of the printed circuit board, said artwork pads distributed over the artwork master and forming parallel columns interspersed between said parallel artwork traces; and interconnecting artwork traces extending from at least some of said parallel artwork traces to adjacent ones of said artwork pads, said parallel artwork traces including interrupted portions adjacent at least some of said interconnecting artwork traces; said parallel artwork traces and said artwork pads being formed with a higher degree of precision than said interconnecting artwork traces and said interrupted portions of said parallel artwork traces.
Claim 2
Dependent Claim
146 words
In an artwork master for the manufacture of one layer in a multilayer printed circuit board: a plurality of parallel artwork traces corresponding to conductive traces on the one layer in the printed circuit board, said traces extending substantially across the artwork master; an array of artwork pads corresponding to conductive pads on the one layer of the printed circuit board, said artwork pads distributed over the artwork master and forming parallel columns interspersed between said parallel artwork traces; and interconnecting artwork traces extending from at least some of said parallel artwork traces to adjacent ones of said artwork pads, said parallel artwork traces including interrupted portions adjacent at least some of said interconnecting artwork traces; said parallel artwork traces and said artwork pads being formed with a higher degree of precision than said interconnecting artwork traces and said interrupted portions of said parallel artwork traces.
Claim 3
Dependent Claim
30 words
The artwork master of claim 1, further comprising artworks terminals on the artwork master corresponding to conductive terminals along one edge of the one layer of the printed circuit board.