Echo detector particularly for speech interpolation communication systems

Claim 1

An echo detector, comprising circuit means for digital differential coding of incoming signals which can include an echo signal including means for generating an error signal responsive to an incoming signal and a predicted signal, first means for dividing said error signal by an average value of a certain number of samples of previously received incoming signals, the sign of said average being the same as the sign of the second-last received sample, second means for dividing the quotient obtained by said first dividing means by the average value of a certain number of such previously computed quotients, first logic circuit means for determining the logarithm to the base 2 of the average value for the incoming signal samples, and second logic circuit means for determining the logarithm to the base 2 of the average value of the quotients, for which only the integer portion is kept, a set of forming two values for each sample for defining one point in a matrix of points, said echo detector further including first counter means for counting a certain number of sets of two values for which the corresponding points are above or on the secondary diagonal of the matrix, second counter means for counting simultaneously the number of sets of values for which the corresponding points are below or on said secondary diagonal, divider means for carrying out the quotient of the count from the first and the second counter, and comparing means for comparing said quotient to a predetermined value to determine if it is greater than said predetermined value, whereby a determination that said quotient is greater indicates that the incoming signal is an echo signal and not an information signal.