US4360713A
Expired / Lapsed
US
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Echo detector particularly for speech interpolation communication systems
Assignee: Individual
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Filing: 1980-03-10
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Granted: 1982-11-23
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Expires: 2000-03-10
Abstract
Abstract An echo detector which is able to distinguish a speech signal echo on the outgoing channel without reference to the signal received at the incoming channel. The echo detector is comprised of a circuit for digital differential coding in which the error signal between the incoming signal and the predicted signal is divided by the average value of a certain number of samples of previously received incoming signals, having sign according to the second-last received sample, the quotient obtained in this first division being again divided by the average value of a certain number of such quotients previously computed, the logarithm to base 2 of the average value for the entering signal samples and the logarithm to base 2 of the average value of the quotients, for which only the integer portion is kept, forming for each treated sample two values defining one point of a matrix of points, a first counter counting for a number of sets of two values for which the corresponding points are above or on the secondary diagonal of the matrix, a second counter counting simultaneously the number of sets of values for which the corresponding points are below or on the above-mentioned secondary diagonal, a divider carrying out the quotient of the counts from the first and the second counter, this quotient being compared to a predetermined value to decide, if it is greater than this value, that the entering signal is an echo and not an information signal.
Inventors
- 👤 Soumagne Joel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 00:22
CPC Classifications
H; H04; H04B; H04B14/00; H04B14/02; H04B14/06; H04B14/066; H04B14/068; H04B3/00; H04B3/02; H04B3/20
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
282 words
An echo detector, comprising circuit means for digital differential coding of incoming signals which can include an echo signal including means for generating an error signal responsive to an incoming signal and a predicted signal, first means for dividing said error signal by an average value of a certain number of samples of previously received incoming signals, the sign of said average being the same as the sign of the second-last received sample, second means for dividing the quotient obtained by said first dividing means by the average value of a certain number of such previously computed quotients, first logic circuit means for determining the logarithm to the base 2 of the average value for the incoming signal samples, and second logic circuit means for determining the logarithm to the base 2 of the average value of the quotients, for which only the integer portion is kept, a set of forming two values for each sample for defining one point in a matrix of points, said echo detector further including first counter means for counting a certain number of sets of two values for which the corresponding points are above or on the secondary diagonal of the matrix, second counter means for counting simultaneously the number of sets of values for which the corresponding points are below or on said secondary diagonal, divider means for carrying out the quotient of the count from the first and the second counter, and comparing means for comparing said quotient to a predetermined value to determine if it is greater than said predetermined value, whereby a determination that said quotient is greater indicates that the incoming signal is an echo signal and not an information signal.
Claim 2
Dependent Claim
282 words
An echo detector, comprising circuit means for digital differential coding of incoming signals which can include an echo signal including means for generating an error signal responsive to an incoming signal and a predicted signal, first means for dividing said error signal by an average value of a certain number of samples of previously received incoming signals, the sign of said average being the same as the sign of the second-last received sample, second means for dividing the quotient obtained by said first dividing means by the average value of a certain number of such previously computed quotients, first logic circuit means for determining the logarithm to the base 2 of the average value for the incoming signal samples, and second logic circuit means for determining the logarithm to the base 2 of the average value of the quotients, for which only the integer portion is kept, a set of forming two values for each sample for defining one point in a matrix of points, said echo detector further including first counter means for counting a certain number of sets of two values for which the corresponding points are above or on the secondary diagonal of the matrix, second counter means for counting simultaneously the number of sets of values for which the corresponding points are below or on said secondary diagonal, divider means for carrying out the quotient of the count from the first and the second counter, and comparing means for comparing said quotient to a predetermined value to determine if it is greater than said predetermined value, whereby a determination that said quotient is greater indicates that the incoming signal is an echo signal and not an information signal.
Claim 3
Dependent Claim
18 words
An echo detector in accordance with claim 1 characterized in that said predetermined value is equal to 2.
Claim 4
Dependent Claim
123 words
An echo detector in accordance with claim 1 characterized in that said first and second counter means are comprised of two pairs of first and second counter means which are used alternately, said divider means including first and second dividers for the respective pairs of said counter means, means for comparing the quotient of one of said pairs of counter means with said predetermined value during a predetermined period of time while the counters of the second pair accumulate values after having been reset to zero at the beginning of said time period, and means effective during a second period for comparing the quotient of the second pair while the counters of the first pair accumulate values after having been reset to zero.
Claim 5
Dependent Claim
120 words
An echo detector in accordance with claim 2 characterized in that said first and second counter means are comprised of two pairs of first and second counters which are used alternately, said divider means including first and second dividers for the respective pairs of said counters means for comparing the quotient of one of said pairs of counters with said predetermined value during a predetermined period of time while the counters of the second pair accumulate values after having been reset to zero at the beginning of said time period, and means effective during a second period for comparing the quotient of the second pair while the counters of the first pair accumulate values after having been reset to zero.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-11-22 | 1986-05-24 | 1986-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-11-22 | 1990-05-24 | 1990-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-11-22 | 1994-05-24 | 1994-11-23 | $7700.00 | Window Closed / Lapsed |