US4355454A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Coating device with As2 -O3 -SiO2
Assignee: Texas Instruments Inc
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Filing: 1981-05-05
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Granted: 1982-10-26
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Expires: 2001-05-05
Abstract
Abstract A method for fabricating a metal oxide semiconductor device having at least one level of polycrystalline silicon interconnects and novel insulation layers for multilevel interconnects. In one embodiment, the fabrication processing includes forming a layer of arsenic doped glass as a multilevel interconnect system insulating layer. In another embodiment, the method includes the formation of a multilevel interconnect system insulating layer which includes the formation of a layer of undoped silicon dioxide as a barrier layer and then forming a layer of arsenic doped glass upon the undoped layer.
Inventors
- 👤 Al F. Tasch, Jr.
- 👤 Horng-Sen Fu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 00:49
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10B; H10B12/00; H10B12/30; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/65; H10P14/6502; H10P14/6506; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/6923; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171; H10P95/00; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/47; H10W20/48
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
86 words
A method of making a semiconductor device comprising the steps of: forming regions of another conductivity type in a substrate of one conductivity type; forming an insulator layer on said substrate; forming at least one layer of gates and gate interconnects on said insulating layer; forming a multilevel interconnect system insulating layer of arsenic doped glass on said layer of gates and gate interconnects; and reflowing said multilevel interconnect system insulating layer by heating said multilevel interconnect system insulating layer sufficiently to smooth said insulating layer.
Claim 2
Independent Claim
86 words
A method of making a semiconductor device comprising the steps of: forming regions of another conductivity type in a substrate of one conductivity type; forming an insulator layer on said substrate; forming at least one layer of gates and gate interconnects on said insulating layer; forming a multilevel interconnect system insulating layer of arsenic doped glass on said layer of gates and gate interconnects; and reflowing said multilevel interconnect system insulating layer by heating said multilevel interconnect system insulating layer sufficiently to smooth said insulating layer.
Claim 3
Dependent Claim
29 words
A method according to claim 1, wherein said step of heating said multilevel interconnect system insulating layer includes heating said insulating layer to a temperature of approximately 850° C.
Claim 4
Dependent Claim
45 words
A method according to claim 1, wherein the step of forming the multilevel interconnect system insulating layer includes the step of forming a layer of undoped silicon dioxide as a barrier layer and then forming a layer of arsenic doped glass upon said undoped layer.
Claim 5
Dependent Claim
29 words
A method according to claim 3, wherein said step of heating said multilevel interconnect system insulating layer includes heating the insulating layer to a temperature of approximately 850° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-10-25 | 1986-04-26 | 1986-10-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-10-25 | 1990-04-26 | 1990-10-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-10-25 | 1994-04-26 | 1994-10-26 | $7700.00 | Window Closed / Lapsed |