Patent US4355374A successfully refreshed from Google Patents.
US4355374A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor memory device
Assignee: Hitachi Ltd
•
Filing: 1980-07-24
•
Granted: 1982-10-19
•
Expires: 2000-07-24
Abstract
Abstract A semiconductor memory comprising a memory cell disposed on a p-type semiconductor substrate and including an insulated-gate field effect transistor and a storage capacitor. The storage capacitor comprises: an insulator capacitor including a first electrode disposed on the substrate, a film of Si 3 N 4 disposed on the first electrode, and a second electrode disposed on the Si 3 N 4 film; and a pn junction capacitor including a first n-type impurity region for constituting either the source or drain of the insulated-gate field effect transistor, and a second p-type impurity region disposed in contact with the first impurity region and having a higher impurity concentration than the substrate.
Inventors
- 👤 Yoshio Sakai
- 👤 Mitsumasa Koyanagi
- 👤 Hideo Sunami
- 👤 Norikazu Hashimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 12:36
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; H; H10; H10B; H10B12/00; H10B12/30; H10B12/31
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
123 words
A semiconductor memory comprising a memory cell disposed on a semiconductor substrate of first conduction type and including an insulated-gate field effect transistor and a storage capacitor, wherein the improvement resides in that said storage capacitor comprises: an insulator capacitor including a first electrode disposed on said substrate, an insulating film disposed on the first-named electrode for providing a dielectric, and a second electrode disposed on said insulating film; and a pn junction capacitor including a first impurity region of second conduction type for constituting one of the source and drain of said insulated-gate field effect transistor, and a second impurity region of first conduction type disposed in contact with the first-named impurity region and having a higher impurity concentration than said substrate.
Claim 2
Dependent Claim
123 words
A semiconductor memory comprising a memory cell disposed on a semiconductor substrate of first conduction type and including an insulated-gate field effect transistor and a storage capacitor, wherein the improvement resides in that said storage capacitor comprises: an insulator capacitor including a first electrode disposed on said substrate, an insulating film disposed on the first-named electrode for providing a dielectric, and a second electrode disposed on said insulating film; and a pn junction capacitor including a first impurity region of second conduction type for constituting one of the source and drain of said insulated-gate field effect transistor, and a second impurity region of first conduction type disposed in contact with the first-named impurity region and having a higher impurity concentration than said substrate.
Claim 3
Dependent Claim
29 words
A semiconductor memory as set forth in claim 1, wherein the first electrode of said insulator capacitor is disposed on the first impurity region of said pn junction capacitor.
Claim 4
Dependent Claim
29 words
A semiconductor memory as set forth in claim 2, wherein the second electrode of said insulator capacitor is set at either a ground potential or a DC bias potential.
Claim 5
Dependent Claim
48 words
A semiconductor memory as set forth in claim 1, wherein the first electrode of said insulator capacitor is disposed on the first impurity region of said pn junction capacitor through said insulating film whereas the second electrode of said insulator capacitor is connected with the first-named impurity region.
Claim 6
Dependent Claim
23 words
A semiconductor memory as set forth in claim 4, wherein the first electrode of said insulator capacitor is set at a ground potential.
Claim 7
Dependent Claim
32 words
A semiconductor memory as set forth in claim 1, wherein the insulating film for providing the dielectric of said insulator capacitor is either a silicon nitride film or a aluminum oxide film.
Claim 8
Dependent Claim
26 words
A semiconductor memory as set forth in claim 1, wherein the first and second electrodes of said insulator capacitor are constructed of a polycrystalline silicon layer.
Claim 9
Dependent Claim
24 words
A semiconductor memory as set forth in claim 7, wherein the gate electrode of said insulated-gate field effect transistor is made of polycrystalline silicon.
References Cited (Backward Citations)
US4164751A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-10-18 | 1986-04-19 | 1986-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-10-18 | 1990-04-19 | 1990-10-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-10-18 | 1994-04-19 | 1994-10-19 | $7700.00 | Window Closed / Lapsed |