Sense amplifier for CCD memory

Claim 2

A sense amplifier for use with a charge coupled device having a sense node and a reference node comprising first means for setting said sense node and said reference node to a first voltage potential, second means for transferring a stored charge and a reference charge potential to said sense node and said reference node, respectively, differential voltage comparator means including cross-coupled transistors responsive to voltage on said node and said reference node whereby one of said transistors is rendered more conductive than the other of said transistors, first and second output voltage terminals, means for charging said output terminals, discharge means operably connected with said first and second output terminals and responsive to the conduction of said cross coupled transistors for selectively discharging one of said output terminals, and capacitive means coupled directly to said cross-coupled transistors and said discharge means for enhancing the selective discharge of one of said output terminals.

Claim 3

A sense amplifier as defined by claim 1 wherein said discharge means includes first and second discharge transistors coupled to said cross coupled transistors whereby the conductivity of said discharge transistors is controlled by the conductivity of said cross coupled transistors, and said capacitive means includes first and second capacitors interconnected with said discharge transistors whereby charge periodically applied to said capacitors is coupled to said discharge transistors to enhance the conduction of said discharge transistors.

Claim 4

A sense amplifier as defined by claim 1 and further including latch means including second cross coupled transistors coupled to said output terminals and responsive to a control signal to latch voltages on said output terminals during a voltage readout.

Claim 5

A sense amplifier as defined by claim 1 or 3 wherein said first means for setting said sense node and reference node comprises first and second depletion mode field effect transistors.

Claim 6

A sense amplifier as defined by claim 1 or 3 and including means for resetting said sense node and said reference node and means for resetting said comparator means, said sense node and said reference node being reset prior to resetting said comparator means.

Claim 7

A sense amplifier as defined by claim 5 and further including clamp means for clamping said first cross-coupled transistors until said output terminals are recharged.

Claim 8

A sense amplifier for use with a charge coupled device having a sense node and a reference node comprising first means for setting said sense node and said reference node to a first voltage potential, second means for transferring a stored charge and a reference charge potential to said sense node and said reference node, respectively, differential voltage comparator means including first cross coupled transistors responsive to voltage on said sense node and said reference node whereby one of said transistors is rendered more conductive than the other of said transistors, first and second output voltage terminals, means for periodically charging said output terminals, discharge means operably connected with said first and second output terminals and responsive to the conduction of said cross coupled transistors for selectively discharging one of said output terminals, and latch means including second cross coupled transistors coupled to said output terminals and responsive to a control signal to latch voltages on said output terminals during a voltage readout.

Claim 9

A sense amplifier for use with a charge coupled device having a sense node and a reference node comprising first means for setting said sense node and said reference node to a first voltage potential, second means for transferring a stored charge and a reference charge potential to said sense node and said reference node, respectively, differential voltage comparator means including first cross coupled transistors responsive to voltage on said sense node and said reference node whereby one of said transistors is rendered more conductive than the other of said transistors, first and second output voltage terminals, means for periodically charging said output terminals, discharge means operably connected with said first and second output terminals and responsive to the conduction of said cross coupled transistors for selectively discharging one of said output terminals, and latch means including second cross coupled transistors coupled to said output terminals and responsive to a control signal to latch voltages on said output terminals during a voltage readout.

Claim 10

A sense amplifier as defined by claim 7 wherein said first means for setting said sense node and said reference node to a first voltage potential comprises first and second depletion mode field effect transistors.

Claim 11

A sense amplifier as defined by claim 7 or 8 and further including capacitive means associated with said discharge means for enhancing the selective discharge of one of said output terminals.

Claim 12

A sense amplifier as defined by claim 9 wherein said discharge means includes first and second discharge transistors coupled to said first cross coupled transistors whereby the conductivity of said discharge transistors is controlled by the conductivity of said first cross coupled transistors, and said capacitive means includes first and second capacitors interconnected with said discharge transistors whereby charge periodically applied to said capacitors is coupled to said discharge transistors to enhance the conduction of said discharge transistors.