Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
227 words
A device for the synchronization of a local timing signal with respect to a data signal, wherein it comprises: a dependence device incorporating a data signal transition detector having an output, a phase comparator for determining the position of the transitions relative to the rising front of the local timing signal and having an input coupled to the output of the detector and an output, and a local timing signal generator having in series an oscillator, a divider with a variable dividing number coupled to the oscillator and having a control input coupled to the output of the phase comparator, and a fixed divider, coupled to the divider having a variable dividing number and having an initiating input and an output, a rapid synchronization circuit comprising counting means for counting the number of coincidences of n successive transitions detected (n equals positive integer) with each of k separate time intervals (k equals positive integer) of the same duration, dividing up the integrality of each local timing signal cycle and for supplying a pulse as from the time at which p coincidences with one of the k time intervals have been counted, having a signal input coupled to the output of the transition detector, an output coupled to the initiating input of the fixed divider and a counting control input coupled to the output of the fixed divider.
Claim 2
Independent Claim
227 words
A device for the synchronization of a local timing signal with respect to a data signal, wherein it comprises: a dependence device incorporating a data signal transition detector having an output, a phase comparator for determining the position of the transitions relative to the rising front of the local timing signal and having an input coupled to the output of the detector and an output, and a local timing signal generator having in series an oscillator, a divider with a variable dividing number coupled to the oscillator and having a control input coupled to the output of the phase comparator, and a fixed divider, coupled to the divider having a variable dividing number and having an initiating input and an output, a rapid synchronization circuit comprising counting means for counting the number of coincidences of n successive transitions detected (n equals positive integer) with each of k separate time intervals (k equals positive integer) of the same duration, dividing up the integrality of each local timing signal cycle and for supplying a pulse as from the time at which p coincidences with one of the k time intervals have been counted, having a signal input coupled to the output of the transition detector, an output coupled to the initiating input of the fixed divider and a counting control input coupled to the output of the fixed divider.
Claim 3
Dependent Claim
78 words
A synchronization device according to claim 1, wherein the counting means comprise an OR gate, k counters, each having an output coupled to the output of a counting means across the OR gate and each having an input, and control means respectively coupling each of the k inputs of the counters to the signal input during one of the k time intervals, each of the k counters being incremented wherever data signal transition is present at its input.
Claim 4
Dependent Claim
78 words
A synchronization device according to claim 2, wherein the control means comprise k AND gates, each having a first input coupled to the signal input, a second input and an output, a signal generator having an input coupled to the output of the fixed divider and k outputs respectively coupled to k second inputs of the k AND gates, the k outputs of the k AND gates being respectively coupled to the k inputs of the k counters.
Claim 5
Dependent Claim
134 words
A synchronization device according to claims 2 or 3, comprising an output, a data signal detector having an output, a first supplementary AND gate having a first input coupled to the output of the counting means, a second input coupled to the output of the fixed divider and an output coupled to the output of the synchronization device, a second supplementary AND gate having a first input, a second input coupled to the output of the transition detector and an output coupled to the signal input of the counting means and to the input of the phase comparator, a differentiating circuit, and wherein the k counters incorporate a resetting input coupled across the differentiating circuit to the first input of the second supplementary AND gate and to the output of the data signal detector.