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US4351020A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit arrangement for equalizing waveforms of push-pull power supply

Assignee: Italtel SpA
•
Filing: 1981-03-26
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Granted: 1982-09-21
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Expires: 2001-03-26
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Abstract

Abstract Two power transistors operating in push-pull, connected in series with respective halves of a transformer primary across a d-c source, are alternately rendered conductive by driving pulses generated during fractions of corresponding half-cycles of a square-wave oscillator. Two integrating networks, connected across these primary halves or across resistors in series therewith, work into a comparator whose output signal, reflecting a dissymmetry between the transistor currents, unbalances the square-wave oscillator to vary the relative width of the two sets of driving pulses until the dissymmetry substantially disappears.

Inventors

  • 👤 Andrea Leti
  • 👤 Enrico Valacca

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 23:11
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/338; H02M3/3385; H02M3/3387; H02M3/3388; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/538; H02M7/53803; H02M7/53806

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 283 words
A circuit arrangement for generating two alternating sets of load-energizing pulses of equal power, comprising: two substantially identical transistors each having two main electrodes and a control electrode, one main electrode of each transistor being connected to a first terminal of a source of direct current having a second terminal connected by way of respective circuit branches to the other main electrode of each transistor, each of said circuit branches including a primary winding forming part of transformer means provided with at least one secondary winding for energizing a load; pulse-generating circuitry with a pair of output leads connected to the control electrodes of said transistors for respectively delivering thereto two interleaved trains of first and second driving pulses of substantially constant recurrence frequency and of a width less than a half-cycle of said recurrence frequency whereby said transistors alternately conduct and energize said primary windings fractions of respective half-cycles; sensing means for producing a pair of measuring variables respectively proportional to the mean current flow through said primary windings, said sensing means including two capacitors each connected in series with a respective resistor across at least part of one of said circuit branches; and comparison means with inputs connected to said capacitors for emitting on error signal representative in sign and magnitude to any difference between said measuring variables, said pulse-generating circuitry having a control input connected to said comparison means for varying the relative width of said first and second driving pulses in a sense tending to reduce said error signal to substantially zero, said pulse-generating circuitry including a square-wave oscillator having a control input connected to said comparison means for producing an unsymmetrical waveform in response to said error signal.
Claim 2
Dependent Claim 283 words
A circuit arrangement for generating two alternating sets of load-energizing pulses of equal power, comprising: two substantially identical transistors each having two main electrodes and a control electrode, one main electrode of each transistor being connected to a first terminal of a source of direct current having a second terminal connected by way of respective circuit branches to the other main electrode of each transistor, each of said circuit branches including a primary winding forming part of transformer means provided with at least one secondary winding for energizing a load; pulse-generating circuitry with a pair of output leads connected to the control electrodes of said transistors for respectively delivering thereto two interleaved trains of first and second driving pulses of substantially constant recurrence frequency and of a width less than a half-cycle of said recurrence frequency whereby said transistors alternately conduct and energize said primary windings fractions of respective half-cycles; sensing means for producing a pair of measuring variables respectively proportional to the mean current flow through said primary windings, said sensing means including two capacitors each connected in series with a respective resistor across at least part of one of said circuit branches; and comparison means with inputs connected to said capacitors for emitting on error signal representative in sign and magnitude to any difference between said measuring variables, said pulse-generating circuitry having a control input connected to said comparison means for varying the relative width of said first and second driving pulses in a sense tending to reduce said error signal to substantially zero, said pulse-generating circuitry including a square-wave oscillator having a control input connected to said comparison means for producing an unsymmetrical waveform in response to said error signal.
Claim 3
Dependent Claim 257 words
A circuit arrangement for generating two alternating sets of load-energizing pulses of equal power, comprising: two substantially identical transistors each having two main electrodes and a control electrode, one main electrode of each transistor being connected to a first terminal of a source of direct current having a second terminal connected by way of respective circuit branches to the other main electrode of each transistor, each of said circuit branches including a primary winding forming part of transformer means provided with at least one secondary winding for energizing a load; pulse-generating circuitry with a pair of output leads connected to the control electrodes of said transistors for respectively delivering thereto two interleaved trains of first and second driving pulses of substantially constant recurrence frequency and of a width less than a half-cycle of said recurrence frequency whereby said transistors alternately conduct and energize said primary windings during fractions of respective half-cycles; sensing means for producing a pair of measuring variables respectively proportional to the mean current flow through said primary windings, said sensing means including a pair of integrating networks each connected in series with a respective diode across one of said primary windings; and comparison means with inputs connected to said sensing means for emitting an error signal representative in sign and magnitude to any difference between said measuring variables, said pulse-generating circuitry having a control input connected to said comparison means for varying the relative width of said first and second driving pulses in a sense tending to reduce said error signal to substantially zero.
Claim 4
Dependent Claim 257 words
A circuit arrangement for generating two alternating sets of load-energizing pulses of equal power, comprising: two substantially identical transistors each having two main electrodes and a control electrode, one main electrode of each transistor being connected to a first terminal of a source of direct current having a second terminal connected by way of respective circuit branches to the other main electrode of each transistor, each of said circuit branches including a primary winding forming part of transformer means provided with at least one secondary winding for energizing a load; pulse-generating circuitry with a pair of output leads connected to the control electrodes of said transistors for respectively delivering thereto two interleaved trains of first and second driving pulses of substantially constant recurrence frequency and of a width less than a half-cycle of said recurrence frequency whereby said transistors alternately conduct and energize said primary windings during fractions of respective half-cycles; sensing means for producing a pair of measuring variables respectively proportional to the mean current flow through said primary windings, said sensing means including a pair of integrating networks each connected in series with a respective diode across one of said primary windings; and comparison means with inputs connected to said sensing means for emitting an error signal representative in sign and magnitude to any difference between said measuring variables, said pulse-generating circuitry having a control input connected to said comparison means for varying the relative width of said first and second driving pulses in a sense tending to reduce said error signal to substantially zero.
Claim 5
Dependent Claim 22 words
A circuit arrangement as defined in claim 1 or 2 wherein said transformer means has a common core carrying said primary windings.
Claim 6
Dependent Claim 35 words
A circuit arrangement as defined in claim 1 wherein said circuit branches include respective resistors in series with said primary windings, said sensing means comprising a pair of integrating networks respectively connected across said resistors.
Claim 7
Dependent Claim 29 words
A circuit arrangement as defined in claim 1 wherein said capacitors are part of a pair of integrating networks connected in series with respective diodes across said primary windings.
Claim 8
Dependent Claim 28 words
A circuit arrangement as defined in claim 2 wherein said pulse-generating circuitry comprises a square-wave oscillator adapted to produce an unsymmetrical waveform in response to said error signal.
Claim 9
Dependent Claim 63 words
A circuit arrangement as defined in claim 1 or 6 wherein said pulse-generating circuitry further comprises sawtooth-generating means driven by said square-wave oscillator for producing first and second triangular pulses during each square-wave cycle and threshold means connected to said sawtooth-generating means for respectively producing said first and second driving pulses upon said first and second triangular pulses surpassing a predetermined reference level.

References Cited (Backward Citations)

US3873903A Cited
US4162524A Cited
US4150426A Cited
US4233658A Cited
US4150424A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-09-20 1986-03-22 1986-09-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-09-20 1990-03-22 1990-09-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-09-20 1994-03-22 1994-09-21 $7700.00 Window Closed / Lapsed

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