← Back to Patent Explorer
US4346344A Expired / Lapsed US ⏱️ 0.0 years remaining

Stable field effect transistor voltage reference

Assignee: Signetics Corp
•
Filing: 1979-02-08
•
Granted: 1982-08-24
•
Expires: 1999-02-08
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A temperature stable voltage reference utilizes an enhancement field effect transistor and a depletion field effect transistor each connected in series with a current source. A differential amplifier has its input terminals separately connected between each of the field effect transistors and their respective current supplies. An input terminal of the field effect transistor is utilized as the reference voltage and is also connected to the gate of one of the field effect transistors, the gate of the other field effect transistor being connected to a reference potential.

Inventors

  • 👤 Robert A. Blauschild

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 10:19
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/245; G05F3/247; H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/84; Y; Y10; Y10S; Y10S323/00; Y10S323/907

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 173 words
A stable voltage reference comprising an enhancement field effect transistor, a depletion field effect transistor, a separate means connected in series with the drain-source terminals of each of said field effect transistors for limiting the flow of current therethrough, a differential amplifier provided with a first input connected between the enhancement field effect transistor and the current limiting means connected thereto and provided with a second input connected between the depletion field effect transistor and the current limiting means connected thereto, means connecting the gate of one of said field effect transistors to a reference potential, and means connecting the output of said differential amplifier to the gate of the other of said field effect transistors, said depletion field effect transistor being provided with a depletion implant sufficient to generate a difference in gate-source voltages between said field effect transistors under identical drain-source current conditions, and the geometric ratios of the width of the channels and the length of the gates of said field effect transistors being sufficient to substantially eliminate temperature drift.
Claim 2
Dependent Claim 173 words
A stable voltage reference comprising an enhancement field effect transistor, a depletion field effect transistor, a separate means connected in series with the drain-source terminals of each of said field effect transistors for limiting the flow of current therethrough, a differential amplifier provided with a first input connected between the enhancement field effect transistor and the current limiting means connected thereto and provided with a second input connected between the depletion field effect transistor and the current limiting means connected thereto, means connecting the gate of one of said field effect transistors to a reference potential, and means connecting the output of said differential amplifier to the gate of the other of said field effect transistors, said depletion field effect transistor being provided with a depletion implant sufficient to generate a difference in gate-source voltages between said field effect transistors under identical drain-source current conditions, and the geometric ratios of the width of the channels and the length of the gates of said field effect transistors being sufficient to substantially eliminate temperature drift.
Claim 3
Dependent Claim 22 words
A stable voltage reference as recited in claim 1, wherein each of said current flow limiting means comprises a constant current source.
Claim 4
Dependent Claim 22 words
A stable voltage reference as recited in claim 2 wherein both of the constant current sources are substantially identical field effect transistors.
Claim 5
Dependent Claim 82 words
A stable voltage reference as recited in claim 1, wherein the ratio of the width of the channel to the length of the gate of said depletion mode field effect transistor is approximately equal to the ratio of the width of the channel to the length of the gate of the enhancement mode field effect transistor multiplied by U E /U D where U is equal to the channel mobility and E and D refer to the enhancement and depletion parameters respectively.
Claim 6
Dependent Claim 124 words
A stable reference as recited in claim 3, wherein the ratio of the width of the channel to the length of the gate of the depletion mode field effect transistor is equal to the ratio of the width of the channel to the length of gate of the corresponding constant current source field effect transistor multiplied by the square of the inverse of ##EQU5## where K is equal to a process constant multiplied by the ratio of the channel width to gate length of the device, U is equal to the channel mobility, α is a constant that depends on substrate dopent density and on the implant dosages used during processing, and E and D refer to the enchancement and depletion device parameters respectively.

References Cited (Backward Citations)

US3975648A Cited
US4068134A Cited
US4100437A Cited
US4096430A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-08-23 1986-02-22 1986-08-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-08-23 1990-02-22 1990-08-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-08-23 1994-02-22 1994-08-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag