US4096430A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Metal-oxide-semiconductor voltage reference
Assignee: General Electric Co
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Filing: 1977-04-04
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Granted: 1978-06-20
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Expires: 1997-04-04
Abstract
Abstract An MOS voltage reference includes four MOS transistors connected in feedback circuit relationship, with the ratio of device width to length being essentially the same in the first two devices in order to provide an output voltage which is substantially constant over a range of input voltages and of temperatures.
Inventors
- 👤 Wesley K. Waldron
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:24
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
171 words
A voltage reference circuit including essentially only metal-oxide-semiconductor (MOS) transistors comprising: a first MOS transistor having gate, source and drain electrodes; a second MOS transistor having gate, source and drain electrodes, the gate and source electrodes of said second MOS transistor connected together and further connected to said drain of said first MOS transistor; a third MOS transistor having gate, source and drain electrodes, said gate electrode of said third MOS transistor connected to said gate and source of said second MOS transistor and said drain electrode connected to said drain electrode of said second MOS transistor and said source electrode connected to said gate electrode of said first MOS transistor; a fourth MOS transistor having gate source and drain electrodes, said gate and source electrodes connected to said source electrode of said first MOS transistor and said drain electrode connected to said source electrode of said third MOS transistor; said first and second MOS transistors characterized by first and second device channel width to length ratios which are essentially equal.
Claim 2
Dependent Claim
171 words
A voltage reference circuit including essentially only metal-oxide-semiconductor (MOS) transistors comprising: a first MOS transistor having gate, source and drain electrodes; a second MOS transistor having gate, source and drain electrodes, the gate and source electrodes of said second MOS transistor connected together and further connected to said drain of said first MOS transistor; a third MOS transistor having gate, source and drain electrodes, said gate electrode of said third MOS transistor connected to said gate and source of said second MOS transistor and said drain electrode connected to said drain electrode of said second MOS transistor and said source electrode connected to said gate electrode of said first MOS transistor; a fourth MOS transistor having gate source and drain electrodes, said gate and source electrodes connected to said source electrode of said first MOS transistor and said drain electrode connected to said source electrode of said third MOS transistor; said first and second MOS transistors characterized by first and second device channel width to length ratios which are essentially equal.
Claim 3
Dependent Claim
29 words
The voltage reference circuit of claim 1 wherein said second and fourth MOS transistors comprise depletion mode MOS transistors and said first and third transistors are enhancement mode transistors.
Claim 4
Dependent Claim
21 words
The voltage reference circuit of claim 1 wherein said first, second, third and fourth MOS transistors comprise enhancement mode MOS transistors.
Claim 5
Dependent Claim
22 words
The voltage reference circuit of claim 1 wherein said first, second, third and fourth MOS transistors each comprise depletion mode MOS transistors.
Claim 6
Dependent Claim
20 words
The voltage reference circuit of claim 2 wherein said depletion mode MOS transistors comprise ion implanted depletion mode MOS transistors.
Claim 7
Dependent Claim
23 words
The voltage reference circuit of claim 1 wherein said fourth MOS transistor comprises a tapped MOS transistor for providing a selectable output voltage.
Claim 8
Dependent Claim
26 words
The device of claim 6 wherein said second and fourth MOS transistors are depletion mode transistors and said first and third transistors are enhancement mode transistors.
Claim 9
Dependent Claim
19 words
The device of claim 6 wherein each of said first, second, third and fourth transistors are enhancement mode transistors.
Claim 10
Dependent Claim
19 words
The device of claim 6 wherein each of said first, second, third and fourth transistors are depletion mode transistors.
Claim 11
Dependent Claim
16 words
The device of claim 7 wherein said depletion mode transistors comprise ion implanted depletion mode transistors.
Claim 12
Dependent Claim
162 words
A voltage reference circuit including essentially only metal-oxide-semiconductor (MOS) transistors comprising: a substantially unregulated voltage source; first and second MOS transistors, each including gate, source and drain electrodes, connected in series circuit relationship across said voltage source, said second MOS transistor having its gate and source electrodes connected together; third and fourth MOS transistors, each including gate, source and drain electrodes connected in series circuit relationship and connected in parallel with said first and second MOS transistors, said fourth MOS having its gate and source electrodes connected together; the junction of said first and second MOS transistors being connected to the gate of said third MOS transistor and the junction of said third and fourth MOS transistors being connected to the gate electrode of said first MOS transistor; the ratio of the geometry ratius of said first and second MOS transistors being selected to provide an output voltage at the juncture of said third and fourth MOS transistors which is essentially constant.
Claim 13
Dependent Claim
162 words
A voltage reference circuit including essentially only metal-oxide-semiconductor (MOS) transistors comprising: a substantially unregulated voltage source; first and second MOS transistors, each including gate, source and drain electrodes, connected in series circuit relationship across said voltage source, said second MOS transistor having its gate and source electrodes connected together; third and fourth MOS transistors, each including gate, source and drain electrodes connected in series circuit relationship and connected in parallel with said first and second MOS transistors, said fourth MOS having its gate and source electrodes connected together; the junction of said first and second MOS transistors being connected to the gate of said third MOS transistor and the junction of said third and fourth MOS transistors being connected to the gate electrode of said first MOS transistor; the ratio of the geometry ratius of said first and second MOS transistors being selected to provide an output voltage at the juncture of said third and fourth MOS transistors which is essentially constant.
Claim 14
Dependent Claim
19 words
The voltage reference circuit of claim 11 wherein said ratio of said geometry ratios is essentially 1 to 1.
Claim 15
Dependent Claim
18 words
The voltage reference circuit of claim 11 wherein said second and fourth MOS transistors comprise depletion mode transistors.
Claim 16
Dependent Claim
20 words
The voltage reference circuit of claim 13 wherein said second and fourth MOS transistors comprise ion implanted depletion mode transistors.
Claim 17
Dependent Claim
19 words
The voltage reference circuit of claim 14 wherein said first and third transistors comprise enhancement mode field effect transistors.
Claim 18
Dependent Claim
17 words
The voltage reference circuit of claim 15 wherein said fourth MOS transistor is a tapped MOS transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-06-19 | 1981-12-19 | 1982-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-06-19 | 1985-12-19 | 1986-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-06-19 | 1989-12-19 | 1990-06-20 | $7700.00 | Window Closed / Lapsed |