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US4335301A Expired / Lapsed US ⏱️ 0.0 years remaining

Wave shaping circuit for electro-optical code readers

Assignee: Intermec IP Corp
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Filing: 1979-09-27
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Granted: 1982-06-15
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Expires: 1999-09-27
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Abstract

Abstract An electrical output signal from an electro-optical code reader is amplified (U1) to develop a first signal which is applied to a positive peak detector (U2D1, C2) and a negative peak detector (U3, D2, C3). The positive peak detector provides a second signal whose voltage level follows that of the first signal as the first signal increases, from the time that the voltage level of the second signal is brought substantially equal to that of the first signal to the time that the first signal begins to decrease, with the voltage level of the second signal thereafter being maintained substantially constant. The negative peak detector provides a third signal whose voltage level follows that of the first signal as the first signal decreases from the time that the voltage level of the third signal is brought substantially equal to that of the first signal to the time that the first signal begins to increase, with the third signal thereafter being maintained substantially constant. The second and third signals are combined (R5,R6) top provide a reference signal whose voltage level is intermediate those of the second and third signals. A comparator (U4) provides a circuit output signal which has a first logic level when the voltage level of the first signal exceeds that of the reference signal and which has a second logic level when the voltage level of the reference signal exceeds that of the first signal. The logic level transitions in the circuit output signal are detected (C4, R10, D6, R11; U5, C5, R9, D7, R 8) to develop pulses which momentarily close fast-acting semiconductor switches (S1, S2) associated with the positive and negative peak detectors, whereby the voltage level of the second signal is brought to that of the first signal at the time that the voltage level of the first signal goes above that of the reference signal, and whereby the voltage level of the third signal is brought to that of the first signal at the time that the voltage level of the first signal goes below that of the reference signal.

Inventors

  • 👤 Roger C. Palmer
  • 👤 William J. Purdue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 21:48
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/10851

Claims Analysis

Total Claims: 35
Claim 1
Independent Claim 443 words
A wave shaping circuit for producing a circuit output signal, which alternates between first and second logic levels, from a code reader electrical output signal whose voltage alternates in a substantially sinusoidal manner between positive and negative peak levels as a coded record is scanned by the code reader, said circuit comprising: (A) first means responsive to the code reader electrical output signal for providing a first signal whose voltage is related to that of the code reader electrical output signal; (B) a positive peak detector responsive to said first signal for providing a second signal, said positive peak detector being operative to cause the voltage level of said second signal to follow that of said first signal, as the voltage level of said first signal increases from the time that the voltage level of said second signal is brought substantially equal to that of said first signal to the time that the voltage level of said first signal begins to decrease, and being further operative to thereafter maintain the voltage level of said second signal substantially constant; (C) a negative peak detector responsive to said first signal for providing a third signal, said negative peak detector being operative to cause the voltage level of said third signal to follow that of said first signal, as the voltage level of said first signal decreases from the time that the voltage level of said third signal is brought substantially equal to that of said first signal to the time that the voltage level of said first signal begins to increase, and being further operative to thereafter maintain the voltage level of said third signal substantially constant; (D) second means combining said second and third signals to provide a reference signal whose voltage level is between those of said second and said third signals; (E) third means for providing said circuit output signal in response to a comparison of the voltage levels of said first and said reference signals, said circuit output signal having said first logic level when the voltage level of said first signal exceeds that of said reference signal and having said second logic level when the voltage level of said reference signal exceeds that of said first signal; and, (F) fourth means for bringing the voltage level of said second signal substantially to that of said first signal at the time that the voltage level of said first signal goes above that of said reference signal, and for bringing the voltage level of said third signal substantially to that of said first signal at the time that the voltage level of said first signal goes below that of said reference signal.
Claim 2
Dependent Claim 443 words
A wave shaping circuit for producing a circuit output signal, which alternates between first and second logic levels, from a code reader electrical output signal whose voltage alternates in a substantially sinusoidal manner between positive and negative peak levels as a coded record is scanned by the code reader, said circuit comprising: (A) first means responsive to the code reader electrical output signal for providing a first signal whose voltage is related to that of the code reader electrical output signal; (B) a positive peak detector responsive to said first signal for providing a second signal, said positive peak detector being operative to cause the voltage level of said second signal to follow that of said first signal, as the voltage level of said first signal increases from the time that the voltage level of said second signal is brought substantially equal to that of said first signal to the time that the voltage level of said first signal begins to decrease, and being further operative to thereafter maintain the voltage level of said second signal substantially constant; (C) a negative peak detector responsive to said first signal for providing a third signal, said negative peak detector being operative to cause the voltage level of said third signal to follow that of said first signal, as the voltage level of said first signal decreases from the time that the voltage level of said third signal is brought substantially equal to that of said first signal to the time that the voltage level of said first signal begins to increase, and being further operative to thereafter maintain the voltage level of said third signal substantially constant; (D) second means combining said second and third signals to provide a reference signal whose voltage level is between those of said second and said third signals; (E) third means for providing said circuit output signal in response to a comparison of the voltage levels of said first and said reference signals, said circuit output signal having said first logic level when the voltage level of said first signal exceeds that of said reference signal and having said second logic level when the voltage level of said reference signal exceeds that of said first signal; and, (F) fourth means for bringing the voltage level of said second signal substantially to that of said first signal at the time that the voltage level of said first signal goes above that of said reference signal, and for bringing the voltage level of said third signal substantially to that of said first signal at the time that the voltage level of said first signal goes below that of said reference signal.
Claim 3
Dependent Claim 79 words
A circuit as recited in claim 1, further comprising initial condition means establishing an initial voltage level of said reference signal at a time before the code reader is scanned across the coded record, said initial voltage level differing from an expected initial voltage level of said first signal and being such that the voltage level of said first signal crosses the initial voltage level of said reference signal as the code reader begins to scan the coded record.
Claim 4
Dependent Claim 36 words
A wave shaping circuit as recited in claim 2, wherein said initial condition means is operative to establish said initial voltage level of said reference signal below said expected initial voltage level of said first signal.
Claim 5
Dependent Claim 37 words
A wave shaping circuit as recited in claim 1, further comprising initial condition means operative to maintain the voltage level of said reference signal at least a predetermined amount below the voltage level of said first signal.
Claim 6
Dependent Claim 41 words
A wave shaping circuit as recited in claim 1, wherein said second means is operative to combine said second and third signals so that said voltage level of said reference signal is midway between those of said second and third signals.
Claim 7
Dependent Claim 46 words
A wave shaping circuit as recited in claim 1, wherein said second means is operative to combine said second and third signals so that said voltage level of said reference signal is closer to that of said third signal than to that of said second signal.
Claim 8
Dependent Claim 32 words
A wave shaping circuit as recited in claim 6, wherein the voltage level of said reference signal is 45% of the separation between the voltage levels of said second and third signals.
Claim 9
Dependent Claim 66 words
A wave shaping circuit as recited in claim 1, wherein said second means is operative to bias the voltage level of said reference signal toward that of said second signal when said circuit output signal has said first logic level and to bias the voltage level of said reference signal toward that of said third signal when said circuit output signal has said second logic level.
Claim 10
Dependent Claim 68 words
A wave shaping circuit as recited in claim 8, wherein the voltage level of said reference signal is 60% of the separation between the voltage levels of said second and third signals when said circuit output signal has said first logic level, and is 40% of the separation between the voltage levels of said second and third signals when said circuit output signal has said second logic level.
Claim 11
Dependent Claim 49 words
A wave shaping circuit as recited in claim 1, further comprising clamping means for limiting the separation between the voltage levels of said second and said third signals to a predetermined amount substantially equal to the expected normal separation between positive and negative peak levels of said first signal.
Claim 12
Dependent Claim 203 words
A wave shaping circuit as recited in claim 1, wherein said positive peak detector includes: a first operational amplifier having inverting and noninverting inputs and an output; a first capacitance; a first unidirectional conducting means coupling the output of said first operational amplifier to said first capacitance, said first unidirectional conducting means being poled to conduct from the output of said first operational amplifier to said first capacitance; means coupling said first capacitance to the inverting input of said first operational amplifier; and, means applying said first signal to the noninverting of said first operational amplifier, whereby said second signal appears across said first capacitance; and, wherein said second peak detector includes: a second operational amplifier having inverting and noninverting inputs and an output; a second capacitance; a second unidirectional conducting means coupling the output of said second operational amplifier to said second capacitance, said second unidirectional conducting means being poled to conduct from said second capacitance to the output of said second operational amplifier; means coupling said second capacitance to the inverting input of said second operational amplifier; and, means applying said first signal to the noninverting input of said second operational amplifier, whereby said third signal appears across said second capacitance.
Claim 13
Dependent Claim 79 words
A wave shaping circuit as recited in claim 11, wherein said fourth means includes: a first fast-acting semiconductor switch connected in shunt with said first operational amplifier and said first unidirectional conducting means between the noninverting input of said first operational amplifier and said first capacitance; and, a second fast-acting semiconductor switch connected in shunt with said second operational amplifier and said second unidirectional conducting means between the noninverting input of said second operational amplifier and said second capacitance.
Claim 14
Dependent Claim 67 words
A wave shaping circuit as recited in claim 11, wherein said fourth means includes: a first fast-acting semiconductor switch connected in shunt with said first unidirectional conducting means between the output of said first operational amplifier and said first capacitance; and, a second fast-acting semiconductor switch connected in shunt with said second unidirectional conducting means between the output of said second operational amplifier and said second capacitance.
Claim 15
Dependent Claim 26 words
A wave shaping circuit as recited in claims 12 or 13, wherein said first and said second fast-acting semiconductor switches each comprise a CMOS transmission gate.
Claim 16
Dependent Claim 25 words
A wave shaping circuit as recited in claims 12 or 13, wherein said first and said second fast-acting semiconductor switches each comprise a field-effect transistor.
Claim 17
Dependent Claim 25 words
A wave shaping circuit as recited in claims 11, 12, or 13, wherein said first and said second unidirectional conducting means each comprise a diode.
Claim 18
Dependent Claim 49 words
A wave shaping circuit as recited in claim 11, wherein said second means includes: a first resistance coupling said first capacitance to a common circuit point; and, a second resistance coupling said second capacitance to said common circuit point, whereby said reference signal appears at said common circuit point.
Claim 19
Dependent Claim 40 words
A wave shaping circuit as recited in claim 17, wherein said first and second resistances are substantially equal-valued, whereby the voltage level of said reference signal is substantially midway between the voltage levels of said second and said third signals.
Claim 20
Dependent Claim 38 words
A wave shaping circuit as recited in claim 17, wherein said first resistance is slightly greater in value than said second resistance, whereby the voltage level of said reference signal is biased toward that of said third signal.
Claim 21
Dependent Claim 114 words
A wave shaping circuit as recited in claim 17, wherein said second means further includes: a series circuit consisting of a third resistance and a switch means, said series circuit being connected in shunt with one of said first and second resistances; and, means actuating and deactuating said switch means in response to said circuit output signal, with the values of said first, second and third resistances being such that the voltage level of said reference signal is biased toward that of said second signal when said circuit output signal has said first logic level and is biased toward that of said third signal when said circuit output signal has said second logic level.
Claim 22
Dependent Claim 51 words
A wave shaping circuit as recited in claim 20, wherein said series circuit is connected in shunt with said first resistance, and wherein said switch means is actuated when said circuit output signal has said first logic level and is deactuated when said circuit output signal has said second logic level.
Claim 23
Dependent Claim 38 words
A wave shaping circuit as recited in claim 20, further comprising means for delaying the actuation and deactuation of said switch means for a predetermined period of time following each logic level transition in said circuit output signal.
Claim 24
Dependent Claim 18 words
A wave shaping circuit as recited in claim 20, wherein said switch means comprises a fast-acting semiconductor switch.
Claim 25
Dependent Claim 19 words
A wave shaping circuit as recited in claim 23, wherein said fast-acting semiconductor switch comprises a CMOS transmission gate.
Claim 26
Dependent Claim 19 words
A wave shaping circuit as recited in claim 23, wherein said fast-acting semiconductor switch comprises a field effect transistor.
Claim 27
Dependent Claim 57 words
A wave shaping circuit as recited in claim 17, further comprising an initial condition means including: a source of positive supply potential; a source of negative supply potential; a third resistance coupling said source of positive supply potential to said first capacitance; and, a fourth resistance coupling said source of negative supply potential to said second capacitance.
Claim 28
Dependent Claim 24 words
A wave shaping circuit as recited in claim 26, wherein the value of said third resistance is greater than that of said fourth resistance.
Claim 29
Dependent Claim 124 words
A wave shaping circuit as recited in claim 17, further comprising an initial condition means including: an operational amplifier having inverting and noninverting inputs and an output; a source of positive supply potential; means coupling said source of positive supply potential to the inverting input of said operational amplifier; means applying said second signal to the noninverting input of said operational amplifier; a pair of series-connected diodes coupling the inverting input of said operational amplifier to the output thereof, said pair of series-connected diodes being poled to conduct from the inverting input to the output; and, a diode coupling said common circuit point to the output of said operational amplifier, said diode being poled to conduct from said common circuit point to the output.
Claim 30
Dependent Claim 62 words
A wave shaping circuit as recited in claim 11, further comprising clamping means including a diode network coupling said first and second capacitances, said diode network being poled to conduct from said first capacitance to said second capacitance to limit the separation between the voltage levels of said second and third signals to the total forward conduction voltage of said diode network.
Claim 31
Dependent Claim 121 words
A wave shaping circuit as recited in claim 1, wherein said fourth means includes: a first differentiating means producing a pulse in response to each first logic level/second logic level transition in said circuit output signal; a second differentiating means providing a pulse in response to each second logic level/first logic level transition in said circuit output signal; first switch means operative to bring the voltage level of said second signal substantially equal to that of said first signal in response to said pulse from said first differentiating means; and, second switch means operative to bring the voltage level of said third signal substantially equal to that of said first signal in response to said pulse from said second differentiating means.
Claim 32
Dependent Claim 39 words
A wave shaping circuit as recited in claim 30, wherein said fourth means further includes: means applying said circuit output signal to said first differentiating means; and, an inverter coupling said circuit output signal to said second differentiating means.
Claim 33
Dependent Claim 91 words
A wave shaping circuit as recited in claim 30, wherein said fourth means further includes: means applying said circuit output signal to said first differentiating means; an operational amplifier configured as a comparator and having inverting and noninverting inputs and an output; means applying said first signal to one of the inverting and noninverting inputs of said operational amplifier; means applying said reference signal to the other of the inverting and noninverting inputs of said operational amplifier; and, means coupling the output of said operational amplifier to said second differentiating means.
Claim 34
Dependent Claim 81 words
A wave shaping circuit as recited in claim 1, wherein said third means includes: an operational amplifier configured as a comparator, said operational amplifier having inverting and noninverting inputs and an output; means applying said first signal to one of the inverting and noninverting inputs of said operational amplifier; and, means applying said reference signal to the other of the inverting and noninverting inputs of said operational amplifier, whereby said circuit output signal appears on the output of said operational amplifier.
Claim 35
Dependent Claim 62 words
A wave shaping circuit as recited in claim 1, wherein said first means includes amplifier means having an input and an output and operative to amplify the voltage level of a signal on its input; and, means for coupling the electrical output signal to the input of said amplifier means, whereby said first signal appears on the output of said amplifier means.

References Cited (Backward Citations)

US3991299A Cited
US3752963A Cited
US3751636A Cited
US3784794A Cited
US3909594A Cited
US3892974A Cited
US3949233A Cited
US4140271A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-06-14 1985-12-14 1986-06-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-06-14 1989-12-14 1990-06-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-06-14 1993-12-14 1994-06-15 $7700.00 Window Closed / Lapsed

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