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US4333080A Expired / Lapsed US ⏱️ 0.0 years remaining

Signal processor

Assignee: Raytheon Co
•
Filing: 1977-07-18
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Granted: 1982-06-01
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Expires: 1997-07-18
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Abstract

Abstract A signal processor is disclosed wherein an intermediate frequency chirp pulse is pulse compressed and the linearly frequency modulated, intermediate frequency component of such compressed pulse is removed. With such an arrangement, various weighting techniques may be effectively used to reduce sidelobes of the compressed pulse while, in a radar system application, retaining the sense of the frequency of a Doppler shifted compressed pulse.

Inventors

  • 👤 John D. Collins
  • 👤 Douglas S. MacFall, Jr.
  • 👤 William A. Sciarretta

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 20:27
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/06; G01S13/08; G01S13/10; G01S13/26; G01S13/28; G01S13/282

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 65 words
A signal processor, comprising: (a) means for pulse compressing an intermediate frequency chirp pulse to produce a compressed pulse having a linearly frequency modulated, intermediate frequency component; and (b) means for removing the linearly frequency modulated, intermediate frequency component of such compressed pulse, such removing means including a quadrature phase detector means for separating the compressed pulse into a pair of quadrature video compressed pulses.
Claim 2
Dependent Claim 65 words
A signal processor, comprising: (a) means for pulse compressing an intermediate frequency chirp pulse to produce a compressed pulse having a linearly frequency modulated, intermediate frequency component; and (b) means for removing the linearly frequency modulated, intermediate frequency component of such compressed pulse, such removing means including a quadrature phase detector means for separating the compressed pulse into a pair of quadrature video compressed pulses.
Claim 3
Dependent Claim 22 words
The signal processor recited in claim 1 including a weighting network for reducing sidelobes of the pair of quadrature video compressed pulses.
Claim 4
Dependent Claim 26 words
The signal processor recited in claim 1 including means for producing the intermediate frequency chirp pulse, such pulse being fed to the quadrature phase detector means.
Claim 5
Dependent Claim 64 words
A signal processor, comprising: (a) means for producing a chirp pulse; (b) means for pulse compressing an intermediate frequency chirp pulse to produce a compressed pulse having a linearly frequency modulated, intermediate frequency component; (c) means for removing the linearly frequency modulated, intermediate frequency component of such compressed pulse, such removal means including heterodyning means fed by the compressed pulse and the chirp pulse.
Claim 6
Dependent Claim 64 words
A signal processor, comprising: (a) means for producing a chirp pulse; (b) means for pulse compressing an intermediate frequency chirp pulse to produce a compressed pulse having a linearly frequency modulated, intermediate frequency component; (c) means for removing the linearly frequency modulated, intermediate frequency component of such compressed pulse, such removal means including heterodyning means fed by the compressed pulse and the chirp pulse.
Claim 7
Dependent Claim 63 words
The signal processor recited in claim 4 wherein the removal means includes a bandpass filter for passing the portion of the signal produced at the output of the heterodyning means having a frequency 2f o , where f o is the intermediate frequency, and a quadrature phase detector means fed by the bandpass filter and a signal having a frequency 2f o .
Claim 8
Dependent Claim 81 words
A signal processor, comprising: (a) means for pulse compressing an intermediate frequency chirp pulse to produce a compressed pulse having a linearly frequency modulated, intermediate frequency component; (b) means for removing the linearly frequency modulated, intermediate frequency component of such compressed pulse, such removing means including a linear envelope detector for producing a signal having the absolute value of the compressed pulse; and (c) a weighting network for reducing sidelobes of the signal produced at the output of the removing means.
Claim 9
Dependent Claim 81 words
A signal processor, comprising: (a) means for pulse compressing an intermediate frequency chirp pulse to produce a compressed pulse having a linearly frequency modulated, intermediate frequency component; (b) means for removing the linearly frequency modulated, intermediate frequency component of such compressed pulse, such removing means including a linear envelope detector for producing a signal having the absolute value of the compressed pulse; and (c) a weighting network for reducing sidelobes of the signal produced at the output of the removing means.
Claim 10
Dependent Claim 97 words
A signal processor, comprising: (a) means for producing a first chirp pulse having a phase angle component 2πf o t±k/2t 2 , where t is time; f o is an intermediate frequency; and k is the frequency slope of the chirp pulse; (b) means for pulse compressing the first chirp pulse to produce a compressed pulse having a phase angle component 2πf o t±(k/2)t 2 ; (c) means for producing a second chirp pulse having a phase angle component, 2πf o t±(k/2)t 2 ; and (d) means for heterodyning the compressed pulse with the second chirp pulse.
Claim 11
Dependent Claim 97 words
A signal processor, comprising: (a) means for producing a first chirp pulse having a phase angle component 2πf o t±k/2t 2 , where t is time; f o is an intermediate frequency; and k is the frequency slope of the chirp pulse; (b) means for pulse compressing the first chirp pulse to produce a compressed pulse having a phase angle component 2πf o t±(k/2)t 2 ; (c) means for producing a second chirp pulse having a phase angle component, 2πf o t±(k/2)t 2 ; and (d) means for heterodyning the compressed pulse with the second chirp pulse.
Claim 12
Dependent Claim 109 words
A signal processor, comprising: (a) means for producing a first chirp pulse having a phase angle component 2πf o ±(k/2)t 2 where: t is time, f o is an intermediate frequency, and k is the frequency slope of the chirp pulse; (b) means for pulse compressing the first chirp pulse to produce a compressed pulse having a phase angle component 2πf o ±(k/2)t 2 ; and (c) heterodyning means fed by the first chirp pulse and the compressed pulse for producing a signal having a phase angle component 2π(2f o t); and (d) phase detector means for detecting the phase angle of the signal produced by the heterodyning means.
Claim 13
Dependent Claim 109 words
A signal processor, comprising: (a) means for producing a first chirp pulse having a phase angle component 2πf o ±(k/2)t 2 where: t is time, f o is an intermediate frequency, and k is the frequency slope of the chirp pulse; (b) means for pulse compressing the first chirp pulse to produce a compressed pulse having a phase angle component 2πf o ±(k/2)t 2 ; and (c) heterodyning means fed by the first chirp pulse and the compressed pulse for producing a signal having a phase angle component 2π(2f o t); and (d) phase detector means for detecting the phase angle of the signal produced by the heterodyning means.
Claim 14
Dependent Claim 112 words
A signal processor, comprising: (a) means for producing a chirp pulse having a phase angle component 2πf o t±(k/2)t 2 where: t is time, k is the chirp slope, and f o is an intermediate frequency; (b) means for producing a second chirp pulse having a phase angle component 2πf o t±(k/2)t 2 ; (c) means for pulse compressing the chirp pulse to produce a compressed pulse having a phase angle component 2πf o t±(k/2)t 2 ; and (d) means for removing the phase angle component 2πf o t±(k/2)t 2 from the compressed pulse, the removing means including a quadrature phase detector responsive to the compressed pulse and the second chirp pulse.
Claim 15
Dependent Claim 112 words
A signal processor, comprising: (a) means for producing a chirp pulse having a phase angle component 2πf o t±(k/2)t 2 where: t is time, k is the chirp slope, and f o is an intermediate frequency; (b) means for producing a second chirp pulse having a phase angle component 2πf o t±(k/2)t 2 ; (c) means for pulse compressing the chirp pulse to produce a compressed pulse having a phase angle component 2πf o t±(k/2)t 2 ; and (d) means for removing the phase angle component 2πf o t±(k/2)t 2 from the compressed pulse, the removing means including a quadrature phase detector responsive to the compressed pulse and the second chirp pulse.
Claim 16
Dependent Claim 26 words
The signal processor recited in claim 9 wherein the removing means includes a heterodyning means fed by the compressed pulse and the chirp pulse producing means.
Claim 17
Dependent Claim 56 words
In a chirp pulse compression radar system wherein a pulse compression section is provided to pulse compress a received chirp pulse having an intermediate frequency, the improvement wherein: means are provided for mixing the compressed pulse with a second chirp pulse having a frequency modulation rate opposite in sense to that of the received chirp pulse.
Claim 18
Dependent Claim 56 words
In a chirp pulse compression radar system wherein a pulse compression section is provided to pulse compress a received chirp pulse having an intermediate frequency, the improvement wherein: means are provided for mixing the compressed pulse with a second chirp pulse having a frequency modulation rate opposite in sense to that of the received chirp pulse.
Claim 19
Dependent Claim 39 words
The improvement recited in claim 11 wherein the mixing means includes a quadrature phase detector and including means for enabling the phase of the received chirp pulse to be phase coherent with the phase of the second chirp pulse.

References Cited (Backward Citations)

US3905033A Cited
US4021805A Cited
US4028700A Cited
US4037159A Cited
US4005417A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-05-31 1985-11-30 1986-06-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-05-31 1989-11-30 1990-06-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-05-31 1993-11-30 1994-06-01 $7700.00 Window Closed / Lapsed

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