Patent US4329627A successfully refreshed from Google Patents.
US4329627A
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High frequency thyristor circuit for energizing a gaseous discharge lamp
Assignee: Esquire Inc
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Filing: 1980-05-08
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Granted: 1982-05-11
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Expires: 2000-05-08
Abstract
Abstract A circuit for energizing a gaseous discharge lamp at high frequency utilizing a thyristor, preferably an SCR. The energizing circuit for the lamp includes a resonant or tank circuit operating at an appropriate high frequency, preferably above the acoustic resonant frequencies of the lamp, and which also commutates an SCR. The cathode/anode of the SCR is connected to a voltage adjusting network to provide an initiating pulse through the SCR to start oscillations in the resonant or tank circuit when the SCR is gated on and which reduces the applied supply potential to the SCR during its conduction period to ensure non-conductive latching of the SCR when the gate thereto is removed by lengthening the natural commutation interval of the SCR. This permits the SCR to be used as a switch at the high frequencies involved, normally about 60 kHz. The gate of the SCR is connected to a gate energizing/deenergizing network for abruptly rendering the SCR conductive and non-conductive, which network includes a pair of capacitive discharge circuits designed to sequentially place appropriate amounts and polarity of charge onto the gate of the SCR.
Inventors
- 👤 Kenneth P. Holmes
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 04:02
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/125; H02M3/135; H02M3/137; H05; H05B; H05B41/00; H05B41/14; H05B41/26; H05B41/28; H05B41/288; H05B41/2885; H05B41/292; H05B41/2928; Y; Y02; Y02B; Y02B20/00; Y10; Y10S; Y10S315/00; Y10S315/05; Y10S315/07
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
170 words
A circuit for generating a high frequency signal to a load, comprising a resonating circuit connected to the load, a thyristor connected to the resonating circuit such that when said thyristor is gated on, the resonating circuit naturally commutates said thyristor at a natural commutation interval, a voltage adjusting circuit connected to said thyristor for providing energy to said resonating circuit when said thyristor is gated on to initiate oscillations in said resonant circuit for driving the load at high frequency, said energy to said resonating circuit being a pulse, said voltage adjusting circuit also providing a potential to said thyristor which changes to a lower value after said thyristor is gated on to thereby ensure non-conductive latching of said thyristor by lengthening said natural commutation interval, and gate energizing means for abruptly forward biasing the gate of said thyristor for turn on thereof, and abruptly negatively biasing the gate of said thyristor following reversal of the rate that said pulse changes from a rising pulse to a declining pulse.
Claim 2
Dependent Claim
170 words
A circuit for generating a high frequency signal to a load, comprising a resonating circuit connected to the load, a thyristor connected to the resonating circuit such that when said thyristor is gated on, the resonating circuit naturally commutates said thyristor at a natural commutation interval, a voltage adjusting circuit connected to said thyristor for providing energy to said resonating circuit when said thyristor is gated on to initiate oscillations in said resonant circuit for driving the load at high frequency, said energy to said resonating circuit being a pulse, said voltage adjusting circuit also providing a potential to said thyristor which changes to a lower value after said thyristor is gated on to thereby ensure non-conductive latching of said thyristor by lengthening said natural commutation interval, and gate energizing means for abruptly forward biasing the gate of said thyristor for turn on thereof, and abruptly negatively biasing the gate of said thyristor following reversal of the rate that said pulse changes from a rising pulse to a declining pulse.
Claim 3
Dependent Claim
56 words
A circuit in accordance with claim 1, wherein said gate energization means includes a capacitor charged by a voltage source, and a bidirectional semiconductor device connected to said capacitor and to the gate of said thyristor, such that a predetermined charge on said capacitor causes conduction of said semiconductor device and gating on of said thyristor.
Claim 4
Dependent Claim
39 words
A circuit in accordance with claim 1, wherein said gate energization means includes maintaining means for applying a gate energizing voltage to said thyristor following the initiating of abrupt forward biasing and preceding the initiation of abrupt negative biasing.
Claim 5
Dependent Claim
58 words
A circuit in accordance with claim 3, wherein said maintaining means includes a transformer winding coupled to said resonant circuit and a capacitor connected to the gate of said thyristor, said capacitor being charged by said inductor when said resonant circuit is in oscillation so as to maintain a forward gate bias on the gate of said thyristor.
Claim 6
Dependent Claim
30 words
A circuit in accordance with claim 4, wherein said gate energization means includes means for discharging said capacitor of said maintaining means and negatively biasing the gate of said thyristor.
Claim 7
Dependent Claim
128 words
A circuit in accordance with claim 5, wherein said discharging means includes a programmable unijunction transistor connected to the side of said first named capacitor opposite from the connection thereof to the gate of said thyristor, a second capacitor connected to the other side of said first named capacitor and to the anode of said programmable unijunction transistor, the gate of said programmable unijunction transistor being connected to said transformer winding coupled to said resonating circuit so that when there is a lessening of potential in said transformer winding resulting from its inductive coupling, the potential on the gate of the programmable unijunction transistor reduces in comparison with its anode causing its conduction and discharging said first named capacitor to abruptly reverse bias the gate of said thyristor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-05-10 | 1985-11-09 | 1986-05-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-05-10 | 1989-11-09 | 1990-05-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-05-10 | 1993-11-09 | 1994-05-11 | $7700.00 | Window Closed / Lapsed |