US4322452A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for passivating semiconductor members
Assignee: Siemens AG
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Filing: 1980-08-18
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Granted: 1982-03-30
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Expires: 2000-08-18
Abstract
Abstract Passivating a semiconductor device by vapor depositing a layer of silicon and thereafter tempering the deposited layer of silicon. As a result of the tempering, a drastic reduction in the blocking current in the blocking direction and the blocking current in the trigger direction of the semiconductor device are achieved.
Inventors
- 👤 Jurgen Krausse
- 👤 Wilhelm Ladenhauf
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:58
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/131; H10W74/147; H10W74/01; H10W74/137; H10W74/40; H10W74/481; Y; Y10; Y10S; Y10S438/00; Y10S438/958
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
88 words
In a process for the passivation of semiconductor devices by the application of a silicon layer, the improvement comprising applying energy to a body of silicon maintained under a vacuum to generate silicon vapors by evaporation from the body of silicon, depositing the evaporated silicon vapors as a layer of silicon on the semiconductor device and thereafter tempering the deposited layer of silicon at temperatures above room temperature to below the crystallization temperature of the vapor deposited silicon for a period of time of at least three hours.
Claim 2
Dependent Claim
88 words
In a process for the passivation of semiconductor devices by the application of a silicon layer, the improvement comprising applying energy to a body of silicon maintained under a vacuum to generate silicon vapors by evaporation from the body of silicon, depositing the evaporated silicon vapors as a layer of silicon on the semiconductor device and thereafter tempering the deposited layer of silicon at temperatures above room temperature to below the crystallization temperature of the vapor deposited silicon for a period of time of at least three hours.
Claim 3
Dependent Claim
32 words
Process as claimed in claim 1, wherein the evaporated vapor deposited layer of silicon is tempered at a temperature within the range of 100° C. above room temperature to about 600° C.
Claim 4
Dependent Claim
34 words
Process as claimed in claim 1 or 2, wherein the evaporated vapor deposited layer of silicon is tempered at temperatures which lie below the melting temperature of a metal applied to the semiconductor device.
Claim 5
Dependent Claim
19 words
Process as claimed in claims 1 or 2, wherein the tempering is carried out in an atmosphere containing oxygen.
References Cited (Backward Citations)
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US3765940A
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Cited
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-03-29 | 1985-09-28 | 1986-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-03-29 | 1989-09-28 | 1990-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-03-29 | 1993-09-28 | 1994-03-30 | $7700.00 | Window Closed / Lapsed |