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US3765940A Expired / Lapsed US ⏱️ 0.0 years remaining

Vacuum evaporated thin film resistors

Assignee: Texas Instruments Inc
•
Filing: 1971-11-08
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Granted: 1973-10-16
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Expires: 1991-11-08
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Abstract

Abstract A thin film resistor is fabricated by coevaporating or codepositing semiconductor material selected from Group IV of the Periodic Table such as, for example, silicon and germanium and a doping material of electrical conductivity modifier such as aluminum, boron, antimony, or arsenic, for example, to form a thin film on an insulating substrate. The substrate may be formed from a material such as ceramic, glass, plastics, and either silicon or germanium if the silicon and germanium is provided with an insulating oxide layer. The amount of dopant in the thin film layer exceeds the solid-solubility limits of the dopant in the semiconductor material. The thin film is then crystallized by annealing to bring the thin film to an increased and stable conductivity state and the sheet resistivity measured. Thereafter the thin film is further annealed to oxidize the metal to produce a desired sheet resistance.

Inventors

  • 👤 H Hentzschel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 01:30
CPC Classifications
H; H01; H01C; H01C7/00; H01C7/006; H01C17/00; H01C17/22; H01C17/26; H01C17/265; Y; Y10; Y10S; Y10S148/00; Y10S148/049; Y10S148/136; Y10S148/15; Y10S148/169; Y10S438/00; Y10S438/934; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49099

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 87 words
A method according to claim 1 wherein the step of annealing said thin film to a desired resistivity includes a first annealing stage at a temperature of about 550* C. to relocate the dopant within the structure of the layer of doped semiconductor material to increase substantially the conductivity of said layer and to stabilize significantly the conductivity of the layer at this increased level; and a second annealing stage at a temperature below about 550* C. wherein the sheet resistance is adjusted to a desired resistivity.
Claim 2
Dependent Claim 20 words
A method according to claim 1 wherein said semiconductor materials are taken from the Group consisting of germanium and silicon.
Claim 3
Dependent Claim 21 words
A method according to claim 1 wherein the dopants are taken from the Group consisting of aluminum, boron, antimony, and arsenic.
Claim 4
Dependent Claim 17 words
A method according to claim 1 wherein the doped semiconductor materials are deposited by an evaporation process.
Claim 5
Dependent Claim 17 words
A method according to claim 1 wherein the doped semiconductor material is deposited using a sputtering process.
Claim 6
Dependent Claim 16 words
A method according to claim 1 wherein the doped semiconductor material is deposited using vacuum techniques.
Claim 7
Dependent Claim 33 words
The method according to claim 2 wherein said dopant is aluminum and said semiconductor is selected from silicon and germanium and said second annealing stage is at a temperature of about 450* C.
Claim 8
Dependent Claim 26 words
A method according to claim 1 wherein the thin film is silicon doped with aluminum annealed at 500* C. for about 10 to about 30 minutes.
Claim 9
Dependent Claim 31 words
A method according to claim 1 wherein said thin film is a germanium aluminum doped film annealed at a temperature of about 550* C. for about 10 to about 30 minutes.

References Cited (Backward Citations)

US3664893A Cited
US3567509A Cited
US3418181A Cited
US3620837A Cited
US3660180A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-10-15 1977-04-16 1977-10-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-10-15 1981-04-16 1981-10-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-10-15 1985-04-16 1985-10-16 $7700.00 Window Closed / Lapsed

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