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US4317221A Expired / Lapsed US ⏱️ 0.0 years remaining

Mobile data receiving system

Assignee: Hitachi Ltd
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Filing: 1980-01-23
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Granted: 1982-02-23
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Expires: 2000-01-23
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Abstract

Abstract A mobile data receiving system for a mobile communication system is disclosed. A clock signal for a digital phase synchronization loop circuit used for receiving digital data such as a dial number is obtained by multiplying or dividing the frequency of the output signal of a highly-stable oscillator for generating a reference frequency for a frequency synthesizer. Also, noise which is generated by the operation of the digital phase synchronization loop circuit is prevented from deteriorating the performance of the transmitter-receiver by the use of a matching circuit located between the frequency multiplier or divider and the digital phase synchronization loop circuit.

Inventors

  • 👤 Mitsuo Toya

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 21:55
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/027

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 129 words
In a transmitter/receiver using a frequency synthesizer coupled to a transmitter and a receiver, a mobile data receiving system comprising a highly-stable oscillator coupled to said frequency synthesizer for producing a fundamental frequency for said frequency synthesizer, a frequency divider coupled to said highly stable oscillator for dividing an output frequency of said oscillator, a clock signal extracting circuit coupled to outputs of said receiver and said frequency divider for extracting a clock signal from the outputs of said frequency divider and receiver, and a data reproducing circuit coupled to outputs of said receiver and said clock signal extracting circuit for reproducing a clock signal obtained by said clock signal extracting circuit and a data signal obtained by said receiver to thereby reproduce digital data received by said receiver.
Claim 2
Dependent Claim 129 words
In a transmitter/receiver using a frequency synthesizer coupled to a transmitter and a receiver, a mobile data receiving system comprising a highly-stable oscillator coupled to said frequency synthesizer for producing a fundamental frequency for said frequency synthesizer, a frequency divider coupled to said highly stable oscillator for dividing an output frequency of said oscillator, a clock signal extracting circuit coupled to outputs of said receiver and said frequency divider for extracting a clock signal from the outputs of said frequency divider and receiver, and a data reproducing circuit coupled to outputs of said receiver and said clock signal extracting circuit for reproducing a clock signal obtained by said clock signal extracting circuit and a data signal obtained by said receiver to thereby reproduce digital data received by said receiver.
Claim 3
Dependent Claim 21 words
A mobile data receiving system according to claim 1, wherein said clock signal extracting circuit comprises a digital phase locked loop.
Claim 4
Dependent Claim 40 words
A mobile data receiving system according to claim 2, further comprising a matching circuit connected between said frequency divider and clock signal extracting circuit for removing noise generated by the digital phase locked loop forming said clock signal extracting circuit.
Claim 5
Dependent Claim 25 words
A mobile data receiving system according to claim 3, wherein there is further provided a second frequency divider between said highly-stable oscillator and frequency synthesizer.
Claim 6
Dependent Claim 80 words
A mobile data receiving system according to claim 3, wherein said matching circuit comprises an attenuator for reducing the output of said frequency divider by said matching circuit, a band-pass filter for converting said output into an analog form, a first amplifier for amplifying said analog output, a coaxial cable for transmitting said analog output, a second amplifier for amplifying said analog output transmitted by said coaxial cable, and a comparator for digitalizing the output of said second amplifier again.
Claim 7
Dependent Claim 131 words
In a transmitter/receiver using a frequency synthesizer coupled to a transmitter and a receiver, a mobile data receiving system comprising a highly-stable oscillator coupled to said frequency synthesizer for producing a fundamental frequency for said frequency synthesizer, means coupled to an output of said oscillator for reducing said oscillator output to a lower frequency, a clock signal extracting circuit coupled to outputs of said receiver and said frequency reducing means for extracting a clock signal from the outputs of said frequency reducing means and receiver, and a data reproducing circuit coupled to outputs of said receiver and said clock signal extracting circuit for reproducing a clock signal obtained by said clock signal extracting circuit and a data signal obtained by said receiver to thereby reproduce digital data received by said receiver.
Claim 8
Dependent Claim 131 words
In a transmitter/receiver using a frequency synthesizer coupled to a transmitter and a receiver, a mobile data receiving system comprising a highly-stable oscillator coupled to said frequency synthesizer for producing a fundamental frequency for said frequency synthesizer, means coupled to an output of said oscillator for reducing said oscillator output to a lower frequency, a clock signal extracting circuit coupled to outputs of said receiver and said frequency reducing means for extracting a clock signal from the outputs of said frequency reducing means and receiver, and a data reproducing circuit coupled to outputs of said receiver and said clock signal extracting circuit for reproducing a clock signal obtained by said clock signal extracting circuit and a data signal obtained by said receiver to thereby reproduce digital data received by said receiver.

References Cited (Backward Citations)

US4031330A Cited
US4019153A Cited
US4038494A Cited
JPS5247315A Cited
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US4070626A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-02-22 1985-08-24 1986-02-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-02-22 1989-08-24 1990-02-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-02-22 1993-08-24 1994-02-23 $7700.00 Window Closed / Lapsed

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