Patent US4311987A successfully refreshed from Google Patents.
US4311987A
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Validity check process for data supplied by digital displacement detectors and detectors using this process
Assignee: MCB SA
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Filing: 1978-06-05
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Granted: 1982-01-19
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Expires: 1998-06-05
Abstract
Abstract A checking process for data supplied by a digital detector with coded tracks. This detector is designed to supply two words of the same format: one word A in Gray code and one word D in Gray code complemented and shifted back by a half coding point. The apparatus includes the numerical deviation is checked between the two words supplied by detector correspondingly to the geometric shift provided by means of conversion levels in natural binary code complementation code as well as an adder and a coincidence gate supplying a validation signal.
Inventors
- 👤 Jacques A. J. Taillebois
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:40
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/14; H03M7/16; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; G11B20/18; H03M1/00; H03M1/12; H03M1/22; H03M1/24; H03M1/28; H03M1/285
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
141 words
A digital displacement detector with a validity check system, the detector having a movable member bearing a set of coded tracks, a first reading device registering with at least one track of said set of tracks and arranged to provide a first word of digital information in a reflected code identifying the position of the movable member relative to the reading device, a second reading device arranged to provide a second word of digital positional information having the same number of bits as the first word and corresponding to a position spaced along the tracks from the position indicated by the first word by a predetermined amount which is a non-integral number of lowest order digital divisions along the tracks, and a checking circuit for checking that the two words have a numerical difference corresponding to said predetermined amount of spacing.
Claim 2
Dependent Claim
141 words
A digital displacement detector with a validity check system, the detector having a movable member bearing a set of coded tracks, a first reading device registering with at least one track of said set of tracks and arranged to provide a first word of digital information in a reflected code identifying the position of the movable member relative to the reading device, a second reading device arranged to provide a second word of digital positional information having the same number of bits as the first word and corresponding to a position spaced along the tracks from the position indicated by the first word by a predetermined amount which is a non-integral number of lowest order digital divisions along the tracks, and a checking circuit for checking that the two words have a numerical difference corresponding to said predetermined amount of spacing.
Claim 3
Dependent Claim
34 words
A detector as claimed in claim 1 wherein said set of coded tracks has two groups of tracks separated in space, each said reading device being associated with a respective one of the groups.
Claim 4
Dependent Claim
33 words
A detector as claimed in claim 1 wherein the movable element has a single group of tracks, both said reading devices being associated with said single group at different positions along the tracks.
Claim 5
Dependent Claim
38 words
A detector as claimed in claim 1 wherein the reading devices are positioned relative to the group or groups of tracks in such a way that the words provided by the reading devices are in mutually complementary codes.
Claim 6
Dependent Claim
22 words
A detector as claimed in claim 1 wherein said nonintegral number is equal to (n+1/2) where n is an integer or zero.
Claim 7
Dependent Claim
117 words
A detector as claimed in claim 1 wherein the checking circuit comprises convertors for transforming said words into natural binary code, a complement circuit for providing the complement of the numerically higher one of said binery words, an adder for adding together said complement word and the numerically lower one of said binary words, any bit of higher order than those of said two words being discarded from the sum, means for adding to the sum an integer equal to the integral part of said non-integral number of lowest order digital divisions, and a coincidence gate for providing a validation signal when all bits except the lowest order bit of the resulting word are equal to "1".
Claim 8
Dependent Claim
83 words
A detector as claimed in claim 1 wherein the checking circuit comprises convertors for transforming said words into natural binary code, a subtractor for subtracting the numerically lower one of said binery words from the numerically higher, mens for substracting from the difference an integer equal to the integral part of said non-integral number of lowest digital divisions, and a coincidence gate for providing a validation signal when all bits except the lower order bit of the resulting word are equal to "0".
Claim 9
Dependent Claim
59 words
A detector as claimed in either of claims 6 or 7, wherein one of the two words provided by the reading devices is in Gray code and the other is in complemented Gray code, and including a complement circuit to reverse the complemented Gray code word to natural Gray code before supplying it to one of the binary convertors.
Claim 10
Dependent Claim
41 words
A detector as claimed in claim 7, wherein said non-integral number of lowest order digital divisions is less than 1, and said means for subtracting said integer, or said means for adding said integer as the case may be, is omitted.
Claim 11
Dependent Claim
20 words
A detector is claimed in any of claims 1 wherein the checking circuit employs at least in part combinational logic.
Claim 12
Dependent Claim
18 words
A detector as claimed in claim 1, wherein the checking circuit employs at least in part sequential logic.
Claim 13
Dependent Claim
43 words
A detector as claimed in any of claim 1 wherein the checking circuit further includes means for verifying that, for at least one of the two words provided, the difference between successive conditions of the word is 0 or 1 lowest order unit.
References Cited (Backward Citations)
US2793807A
Cited
US2986726A
Cited
US3143730A
Cited
US3156911A
Cited
DE1549265C3
Cited
US3913094A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-01-18 | 1985-07-20 | 1986-01-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-01-18 | 1989-07-20 | 1990-01-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-01-18 | 1993-07-20 | 1994-01-19 | $7700.00 | Window Closed / Lapsed |