Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
141 words
In a control circuit for supplying firing pulses to a multipulse rectifier by the amplification of ignition control signals, the start of each of which is determined by comparing the periodic reference voltage output of an oscillator controlled by a clocking AC voltage with a DC control voltage, the improvement comprising: (a) means for forming a first control signal sequence from the ignition control signals; (b) means for delaying the control signal sequence by a period of time substantially corresponding to the greatest possible time asymmetry of the ignition control signals; (c) means for forming a highly accurate trigger pulse sequence from the delayed control signal sequence which is phase-locked to the delayed control signal sequence; and (d) means for conjunctively linking the ignition control signals to the trigger pulse sequence to form corrected ignition control pulses for the multipulse rectifier.
Claim 2
Dependent Claim
141 words
In a control circuit for supplying firing pulses to a multipulse rectifier by the amplification of ignition control signals, the start of each of which is determined by comparing the periodic reference voltage output of an oscillator controlled by a clocking AC voltage with a DC control voltage, the improvement comprising: (a) means for forming a first control signal sequence from the ignition control signals; (b) means for delaying the control signal sequence by a period of time substantially corresponding to the greatest possible time asymmetry of the ignition control signals; (c) means for forming a highly accurate trigger pulse sequence from the delayed control signal sequence which is phase-locked to the delayed control signal sequence; and (d) means for conjunctively linking the ignition control signals to the trigger pulse sequence to form corrected ignition control pulses for the multipulse rectifier.
Claim 3
Dependent Claim
45 words
In a circuit in accordance with claim 1, the further improvement comprising: the means for forming a control signal sequence comprising an OR gate having inputs to one of which the ignition control signals are supplied and at whose output the control signal sequence appears.
Claim 4
Dependent Claim
51 words
In a circuit in accordance with claim 1, the further improvement comprising: the means for delaying the control signal sequence comprising a timing stage having a preset delay, to the input of which the control signal sequence is supplied and at the output of which the delayed control signal sequence appears.
Claim 5
Dependent Claim
61 words
In a circuit in accordance with claim 1, the further improvement comprising: the means for forming a highly accurate trigger pulse comprising a phase control circuit having a phase detector which is coupled to a voltage-controlled oscillator; and the phase detector having as input the output of the voltage-controlled oscillator carrying the trigger pulse sequence and the delayed control signal sequence.
Claim 6
Dependent Claim
59 words
In a circuit in accordance with claim 1, the further improvement comprising: the means for conjunctively linking comprising a number of first AND gates, to one input of each of which is coupled an ignition control signal for a controlled main valve of the rectifier, and to another input of each of which the trigger pulse sequence is coupled.
Claim 7
Dependent Claim
63 words
In a circuit in accordance with claim 1, the further improvement comprising: (a) means coupled to the ignition control signals for forming a second delayed control signal sequence providing a delay longer than that of the first control signal sequence; (b) means for conjunctively linking the ignition control signals to the second delayed control signal sequence to form the corrected ignition control pulses.
Claim 8
Dependent Claim
134 words
In a circuit in accordance with claim 5 the further improvement comprising: (a) a second time delay stage having a preset delay, the input to the second time delay stage being coupled to the output of the first time delay stage; (b) a number of second AND gates, to the first input of each of which the ignition control signal for a controlled main valve of the rectifier is supplied and to the second input of each of which the output of the second time delay stage is supplied; (c) a number of OR gates, one input of each gate being coupled to an output of one of the first AND gates and one input of each gate being coupled to a corrected ignition control signal for a controlled main valve of the rectifier.