US4297642A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Offset correction in operational amplifiers
Assignee: AT&T Inc
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Filing: 1979-10-31
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Granted: 1981-10-27
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Expires: 1999-10-31
Abstract
Abstract A circuit which includes an operational amplifier (101) and includes switches (104, 106) for cancelling offset buildup in the amplifier in response to a circuit (110) which detects zero crossings of the input signal. Where the frequency of the input is higher than the frequency at which cancellation is necessary, circuit (110) may respond only to the zero crossing next following each of a regularly occurring series of timing pulses.
Inventors
- 👤 Gary L. Baldwin
- 👤 James L. McCreary
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 15:02
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/303
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
55 words
Apparatus including an operational amplifier (101) which is adapted to receive an input signal, said apparatus comprising: means (104, 106) connected with the output of said operational amplifier and operable to cancel d.c. offset in said amplifier, CHARACTERIZED BY means (110) for operating said cancelling means in response to zero crossings in said input signal.
Claim 2
Dependent Claim
55 words
Apparatus including an operational amplifier (101) which is adapted to receive an input signal, said apparatus comprising: means (104, 106) connected with the output of said operational amplifier and operable to cancel d.c. offset in said amplifier, CHARACTERIZED BY means (110) for operating said cancelling means in response to zero crossings in said input signal.
Claim 3
Dependent Claim
28 words
The invention defined in claim 1 wherein said cancelling means includes means (109 or 303) for storing the output of said amplifier when the input thereto is zero.
Claim 4
Dependent Claim
24 words
The invention defined in claim 2 wherein said cancelling means is arranged to periodically apply said stored output to the input of said amplifier.
Claim 5
Dependent Claim
39 words
The invention defined in claim 1 wherein said apparatus includes a source (202) of clock pulses, and said operating means (110) is arranged to actuate said cancelling means at the zero crossing next following each of said clock pulses.
Claim 6
Dependent Claim
64 words
Apparatus for cancelling offset in an operational amplifier circuit including switch means for (a) interconnecting the output of said amplifier with a storage element while concurrently connecting the input to said amplifier to zero, and (b) connecting said storage element to said amplifier input, and means for operating said switch means in response to zero crossings of the signal applied to said amplifier input.
Claim 7
Dependent Claim
64 words
Apparatus for cancelling offset in an operational amplifier circuit including switch means for (a) interconnecting the output of said amplifier with a storage element while concurrently connecting the input to said amplifier to zero, and (b) connecting said storage element to said amplifier input, and means for operating said switch means in response to zero crossings of the signal applied to said amplifier input.
Claim 8
Dependent Claim
31 words
The invention defined in claim 5 wherein said operating means comprises a source of regularly occurring timing pulses and circuit means responsive to the zero crossing next following each timing pulse.
Claim 9
Independent Claim
61 words
A method of cancelling offset in an operational amplifier circuit, including the steps of: storing the output of said amplifier and thereafter connecting said stored output to the input of said amplifier, wherein said method is CHARACTERIZED BY controlling the times of occurrence of said storing step as a function of zero crossings in the signal applied to said amplifier input.
Claim 10
Independent Claim
61 words
A method of cancelling offset in an operational amplifier circuit, including the steps of: storing the output of said amplifier and thereafter connecting said stored output to the input of said amplifier, wherein said method is CHARACTERIZED BY controlling the times of occurrence of said storing step as a function of zero crossings in the signal applied to said amplifier input.
Claim 11
Dependent Claim
25 words
The method of claim 7 wherein said controlling step includes selecting only those zero crossings next following each output from a source of clock pulses.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-10-26 | 1985-04-27 | 1985-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-10-26 | 1989-04-27 | 1989-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-10-26 | 1993-04-27 | 1993-10-27 | $7700.00 | Window Closed / Lapsed |