Apparatus for receiving storing and outputting digital signal sequences

Claim 1

Apparatus for receiving, storing and outputting digital signal sequences, said apparatus comprising: a serial first-in-first-out storage means, having a digital signal input and an input clock terminal for storing a digital signal received under control of an input clock signal, a digital signal output and an output clock terminal for outputting and erasing a digital signal stored under control of an output clock signal, retrocoupling means having a first position for interconnecting said digital signal output to said digital signal input and a second position for receiving a digital signal from an external terminal; a control means having a primary clock input, a primary clock output coupled to said input clock and output clock terminals, first and second inhibit lines for selectively inhibiting said input clock terminal and output clock terminal, respectively, a further control output for controlling the position of said retrocoupling means, a first data input connected to said digital signal output and a second data input for receiving a further digital signal to be compared to the signal on said first data input in a first comparing means linked thereto; said control means having furthermore a control signal input for receiving mode control signals, said mode control signals comprising: a first signal for controlling a storing mode by driving said retrocoupling means to said second position while furthermore driving said input clock terminal but inhibiting said output clock terminal; a second signal for controlling an erasing mode by driving said output clock terminal but inhibiting presentation of a digital signal at said digital signal input; a third signal for controlling a modifying mode regarding an individual digital signal as stored in said storage means by driving said retrocoupling means to said second position while furthermore cooperatively driving said input clock terminal and said output clock terminal; a fourth signal for controlling an outputting mode thereby outputting a sequence of digital signals as stored in said storage means by driving said retrocoupling means to said first position while furthermore cooperatively driving said input clock terminal and said output clock terminal; a fifth signal for controlling a first addressing mode thereby content-addressing said storage means by activating said first comparing means for generating, upon equality detected therein, a first equality signal for co-controlling a further one of said control signals.

Claim 6

An apparatus as claimed in claims 1 or 2, wherein an output of each of said comparing means is connected to a logical OR-gate for upon reception in said OR-gate of a detected equality, generating a termination signal for thereupon inhibiting said primary clock output.