US4292156A
Expired / Lapsed
US
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Method of manufacturing semiconductor devices
Assignee: Fujitsu Ltd
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Filing: 1979-02-28
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Granted: 1981-09-29
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Expires: 1999-02-28
Abstract
Abstract A method of manufacturing a semiconductor device which has a thick insulating layer on a region for isolating semiconductor circuit elements from one another on a semiconductor substrate. This region of the substrate is selectively etched by using an insulating layer to leave the unetched part of the substrate in a mesa like shape, then, an anti-oxidation masking layer is formed on the sides of the insulating layer and the sides of the mesa shaped part and, after that, the thick insulating layer is formed by an oxidation treatment.
Inventors
- 👤 Takashi Matsumoto
- 👤 Takahiro Nawata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 22:44
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/40; H10P14/00; H10P14/60; H10P14/61; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10P50/69; H10P50/691; H10P50/692; H10P50/693; H10P50/695; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S148/00; Y10S148/117; Y10S148/143
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
199 words
A method of manufacturing a semiconductor device comprising the steps of: selectively masking a region of a silicon semiconductor substrate with an insulating layer of silicon dioxide, in which region a semiconductor circuit element is to be formed; etching the unmasked region of said silicon semiconductor substrate to form the unetched part of said silicon semiconductor substrate into a mesa like shape; forming an anti-oxidation masking layer over the entire surface of both of said insulating layer and said silicon semiconductor substrate; bombarding said anti-oxidation masking layer with ions from a direction which is almost at a right angle to the surface of said silicon semiconductor substrate; selectively etching said anti-oxidation masking layer to leave a part of said anti-oxidation masking layer on the sides of said insulating layer and on the sides of said mesa shaped part of said silicon semiconductor substrate; oxidizing the unmasked region of said silicon semiconductor substrate to form a silicon dioxide field oxide layer; removing said insulating layer from said region of said silicon semiconductor substrate in which said circuit element is to be formed, thereby exposing said region; removing said anti-oxidation masking layer; and forming said circuit element in said exposed region.
Claim 2
Independent Claim
199 words
A method of manufacturing a semiconductor device comprising the steps of: selectively masking a region of a silicon semiconductor substrate with an insulating layer of silicon dioxide, in which region a semiconductor circuit element is to be formed; etching the unmasked region of said silicon semiconductor substrate to form the unetched part of said silicon semiconductor substrate into a mesa like shape; forming an anti-oxidation masking layer over the entire surface of both of said insulating layer and said silicon semiconductor substrate; bombarding said anti-oxidation masking layer with ions from a direction which is almost at a right angle to the surface of said silicon semiconductor substrate; selectively etching said anti-oxidation masking layer to leave a part of said anti-oxidation masking layer on the sides of said insulating layer and on the sides of said mesa shaped part of said silicon semiconductor substrate; oxidizing the unmasked region of said silicon semiconductor substrate to form a silicon dioxide field oxide layer; removing said insulating layer from said region of said silicon semiconductor substrate in which said circuit element is to be formed, thereby exposing said region; removing said anti-oxidation masking layer; and forming said circuit element in said exposed region.
Claim 3
Dependent Claim
36 words
A method according to claim 1, wherein in said step of etching said unmasked region of said silicon semiconductor substrate, said unmasked region is etched in an amount of from 0.1 to 0.5 μm in thickness.
Claim 4
Dependent Claim
14 words
A method according to claim 1, wherein said anti-oxidation masking layer comprises silicon nitride.
Claim 5
Dependent Claim
26 words
A method according to claim 1, wherein the thickness of said silicon dioxide field oxide layer is in the range of from 0.5 to 1.5 μm.
Claim 6
Dependent Claim
69 words
A method according to claim 1, wherein the step of removing said insulating layer comprises the steps of: applying a photoresist on all the surfaces of said insulating layer and said silicon dioxide field oxide layer; opening a window having a smaller size than that of said insulating layer in the photoresist on said insulating layer; and selectively etching said insulating layer with an etching agent through said window.
Claim 7
Dependent Claim
24 words
A method according to claim 1, wherein said semiconductor circuit element to be formed is a metal oxide semiconductor field effect transistor circuit element.
Claim 8
Dependent Claim
18 words
A method according to claim 6 wherein said insulating layer is formed into an inverted mesa like shape.
Claim 9
Independent Claim
208 words
A method of manufacturing a semiconductor device comprising the steps of: selectively masking a region of a silicon semiconductor substrate with an insulating layer of silicon dioxide, in which region a semiconductor circuit element is to be formed, said insulating layer formed into an inverted mesa like shape; etching the unmasked region of said silicon semiconductor substrate to form the unetched part of the silicon semiconductor substrate into a mesa like shape; forming an anti-oxidation masking layer over the entire surface of both said insulating layer and said silicon semiconductor substrate; bombarding said anti-oxidation masking layer with ions from a direction which is almost at a right angle to the surface of said silicon semiconductor substrate; selectively etching said anti-oxidation masking layer to leave a part of said anti-oxidation masking layer on the sides of the insulating layer and on the sides of said mesa shaped part of said silicon semiconductor substrate; oxidizing the unmasked region of said silicon semiconductor substrate to form a silicon dioxide field oxide layer; removing said insulating layer from said region of said silicon semiconductor substrate in which said circuit element is to be formed, thereby exposing said region; removing said anti-oxidation masking layer; and forming said circuit element in said exposed region.
Claim 10
Independent Claim
208 words
A method of manufacturing a semiconductor device comprising the steps of: selectively masking a region of a silicon semiconductor substrate with an insulating layer of silicon dioxide, in which region a semiconductor circuit element is to be formed, said insulating layer formed into an inverted mesa like shape; etching the unmasked region of said silicon semiconductor substrate to form the unetched part of the silicon semiconductor substrate into a mesa like shape; forming an anti-oxidation masking layer over the entire surface of both said insulating layer and said silicon semiconductor substrate; bombarding said anti-oxidation masking layer with ions from a direction which is almost at a right angle to the surface of said silicon semiconductor substrate; selectively etching said anti-oxidation masking layer to leave a part of said anti-oxidation masking layer on the sides of the insulating layer and on the sides of said mesa shaped part of said silicon semiconductor substrate; oxidizing the unmasked region of said silicon semiconductor substrate to form a silicon dioxide field oxide layer; removing said insulating layer from said region of said silicon semiconductor substrate in which said circuit element is to be formed, thereby exposing said region; removing said anti-oxidation masking layer; and forming said circuit element in said exposed region.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-09-28 | 1985-03-30 | 1985-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-09-28 | 1989-03-30 | 1989-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-09-28 | 1993-03-30 | 1993-09-29 | $7700.00 | Window Closed / Lapsed |