Abstract A stepper motor drive which sequentially energizes the windings of a stepper motor (1,2,3,4). The drive includes a binary counter (11) fed by a clock signal and two multipliers (D.A.C.1, D.A.C.2) which are fed by the binary counter (11) and a reference signal. An adjustable feedback network (30) is arranged to combine a fraction of the output of the multipliers (V 1 , V 2 ) with the reference signal so that the output of the multiplier represents unequal steps of a staircase waveform. A switching network (13) under the control of the counter (11) applies to the windings drive signals in accordance with the output of the multipliers. Each winding has its own amplifier (15,17) to control its current, and pairs of antiphase signals from the switching network (13) are combined in the amplifiers to produce symmetrical changes of current in a respective pair of coils (1 and 2 or 3 and 4). The feedback network (30) distorts the otherwise linear outputs from the multipliers (D.A.C.1, D.A.C.2) and the degree of distortion can be adjusted to compensate for non-linearity in the stepper motor.
Inventors
👤 Raymond W. Throssell
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-11-05 13:38
CPC Classifications
H; H02; H02P; H02P8/00; H02P8/14; H02P8/18
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
103 words
A stepper motor drive which is arranged to sequentially energise the windings of a stepper motor, the drive including at least one generator of a staircase signal comprising a multiplier fed by a reference signal and the output of a clocked binary counter, an adjustable feedback network which is arranged to combine a fraction of the output of the mutliplier with the reference signal, so that the output of the multiplier represents unequal steps of a staircase waveform, and a switching network which under the control of the counter applies to the windings drive signals in accordance with the output of the multiplier.
Claim 2
Dependent Claim
103 words
A stepper motor drive which is arranged to sequentially energise the windings of a stepper motor, the drive including at least one generator of a staircase signal comprising a multiplier fed by a reference signal and the output of a clocked binary counter, an adjustable feedback network which is arranged to combine a fraction of the output of the mutliplier with the reference signal, so that the output of the multiplier represents unequal steps of a staircase waveform, and a switching network which under the control of the counter applies to the windings drive signals in accordance with the output of the multiplier.
Claim 3
Dependent Claim
84 words
A drive according to claim 1 further comprising a second multiplier, and an amplifier for applying current to a winding of said motor; the first and the second of said multipliers providing outputs representing an asymmetrically falling staircase waveform and an asymmetrically rising staircase waveform the shapes of which are at least partly determined by the feedback network, which waveforms are fed by the switching network to said amplifier which combines the waveforms such that a symmetrical waveform is applied to the motor winding.
Claim 4
Dependent Claim
60 words
A drive according to claim 2 further comprising additional amplifiers for applying currents to additional windings of said motor; the staircase waveforms being also fed to the amplifier of a corresponding motor winding such that when a symmetrically falling waveform is applied to one winding of said motor, a symmetrically rising waveform is applied to another winding of said motor.
Claim 5
Dependent Claim
29 words
A drive according to claim 2 or claim 3 in which the multipliers are fed by a common reference signal, and the feedback network is common to both multipliers.
Claim 6
Dependent Claim
27 words
A drive according to claim 1 in which the direction of rotation of the motor is reversible by reversing the direction of counting of the binary counter.
Claim 7
Dependent Claim
15 words
A drive according to claim 1 in which the multipliers are digital to analogue converters.