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US4281319A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital-to-analog converter

Assignee: Ricoh Co Ltd
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Filing: 1980-06-30
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Granted: 1981-07-28
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Expires: 2000-06-30
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Abstract

Abstract A bipolar converter for analog and digital conversion is based on a single-ended MOS chip having a grounded substrate. The MOS chip includes a 2 N R ladder and an on-chip output polarity switch which establishes the polarity and range of a separate bipolar output amplifier while it minimizes the number of power supplies. The resolution of the MOS chip is effectively doubled without substantially increasing element count. A matrix decoder is employed in a tree decoder to minimize the physical size and element count of the tree decoder.

Inventors

  • 👤 Ben D. Roberts, Jr.

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 16:24
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/40; H03M1/46; H03M1/66; H03M1/74

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 385 words
An apparatus for converting a digital code of a plurality of digital signal lines into an analog signal value representative of said digital code wherein said analog signal value may have either a positive or negative polarity, said apparatus comprising: a Metal Oxide Semiconductor silicon substrate including means for coupling said substrate to a ground reference as the substrate reference voltage V ss ; a Metal Oxide Semiconductor resistor means disposed on said substrate in a series ladder having means for coupling a first end to a first analog voltage reference V ref 1 and a second opposing end to a second analog voltage reference V ref 2, such that said first analog voltage reference is of a higher voltage and of the same polarity as said second analog voltage reference and said substrate is reverse biased between said first analog voltage and said substrate reference voltage, said resistor means having a plurality of taps between said first end and said second end thereby to define a 2 N R ladder; a first analog signal node upon said substrate, said first node coupling voltage signal lines through a first pair of analog switches to said first analog voltage reference and to said second analog voltage reference, said first pair of analog switches being coupled in inverting complement having its control input coupled to means for providing a sign bit of said digital signal lines; a tree decoding means on said substrate coupling voltage signal lines between said taps and a second analog signal node through analog switches, said analog switches being coupled in pairs in inverting complement to means for providing bit values of said digital signal lines; means on said substrate for conveying a signal representative of said voltage signal at said second node to an output terminal of said substrate; and amplifier means coupled to said first node and to said substrate output terminal, said amplifier means having a first input and a second input, said second input being responsive to a voltage signal applied to said second node for reproducing as an output a signal having an amplitude proportional to said voltage signal, and said first input being responsive to selected first and second voltage levels at said first node to establish the polarity of said signal applied to said second node.
Claim 2
Independent Claim 385 words
An apparatus for converting a digital code of a plurality of digital signal lines into an analog signal value representative of said digital code wherein said analog signal value may have either a positive or negative polarity, said apparatus comprising: a Metal Oxide Semiconductor silicon substrate including means for coupling said substrate to a ground reference as the substrate reference voltage V ss ; a Metal Oxide Semiconductor resistor means disposed on said substrate in a series ladder having means for coupling a first end to a first analog voltage reference V ref 1 and a second opposing end to a second analog voltage reference V ref 2, such that said first analog voltage reference is of a higher voltage and of the same polarity as said second analog voltage reference and said substrate is reverse biased between said first analog voltage and said substrate reference voltage, said resistor means having a plurality of taps between said first end and said second end thereby to define a 2 N R ladder; a first analog signal node upon said substrate, said first node coupling voltage signal lines through a first pair of analog switches to said first analog voltage reference and to said second analog voltage reference, said first pair of analog switches being coupled in inverting complement having its control input coupled to means for providing a sign bit of said digital signal lines; a tree decoding means on said substrate coupling voltage signal lines between said taps and a second analog signal node through analog switches, said analog switches being coupled in pairs in inverting complement to means for providing bit values of said digital signal lines; means on said substrate for conveying a signal representative of said voltage signal at said second node to an output terminal of said substrate; and amplifier means coupled to said first node and to said substrate output terminal, said amplifier means having a first input and a second input, said second input being responsive to a voltage signal applied to said second node for reproducing as an output a signal having an amplitude proportional to said voltage signal, and said first input being responsive to selected first and second voltage levels at said first node to establish the polarity of said signal applied to said second node.
Claim 3
Dependent Claim 32 words
The apparatus according to claim 1 wherein said resistor means is disposed in a serpentine pattern on said substrate, further comprising means for selectively activating said tree decoding means in a matrix.
Claim 4
Dependent Claim 35 words
The apparatus as claimed in claim 1 wherein said amplifier means is an operational amplifier having substantially linear negative feedback, and wherein said first node is coupled to the inverting input of said operational amplifier.
Claim 5
Dependent Claim 34 words
The apparatus as claimed in claim 1 wherein said amplifier is an operational amplifier having substantially linear negative feedback, and wherein said first node is coupled to the noninverting input of said operational amplifier.
Claim 6
Dependent Claim 41 words
The apparatus as claimed in claim 1 wherein said conveying means is a buffer amplifier on said substrate whereby the output impedance of said second node at said output terminal is reduced to match the input impedance of said amplifier means.
Claim 7
Dependent Claim 75 words
The apparatus as claimed in claim 1 coupled to generate a digital output from an analog input signal further including a comparator means and a successive approximation register means, wherein said analog output signal is coupled to a first input of said comparator means and wherein a second analog input signal is coupled to the second input of said comparator means, the output of said comparator means being coupled to said successive approximation register means.
Claim 8
Dependent Claim 30 words
The apparatus as claimed in claim 1 wherein said first analog voltage reference is constrained to a level sufficiently low so as to minimize voltage drop across said analog switches.
Claim 9
Dependent Claim 28 words
The apparatus as claimed in claim 7 wherein said second analog voltage reference is constrained to be in the common mode amplification range of said output buffer amplifier.

References Cited (Backward Citations)

US3475749A Cited
US4160244A Cited
US4200863A Cited
US4198622A Cited
US4196420A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-07-27 1985-01-26 1985-07-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-07-27 1989-01-26 1989-07-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-07-27 1993-01-26 1993-07-28 $7700.00 Window Closed / Lapsed

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