Electronic attenuator apparatus

Claim 2

An electronic attenuator apparatus comprising: a plurality of voltage controlled attenuator circuits each varying an attenuation factor between an input and an output in response to the level of a voltage supplied thereto; a plurality of hold circuits each connected to a corresponding said attenuator circuit for holding said voltage and for supplying it to said attenuator circuit to control said attenuation factor; a level setting circuit for manually setting a level signal indicating said level of the voltage; and control means for selectively supplying said level signal from said level setting circuit to one of said hold circuits.

Claim 3

An apparatus according to claim 1 wherein each of said hold circuits includes a memory circuit for storing said level signal.

Claim 4

An apparatus according to claim 2 wherein said level setting circuit includes a plurality of switches connected in parallel with each other to provide said level signal.

Claim 5

An apparatus according to claim 3 wherein said control means includes a NOR gate for operating one of said memory circuits to store said level signal therein.

Claim 6

An apparatus according to claim 3 wherein said level setting circuit includes a plurality of voltage sources each being connected in parallel with the switches, respectively, which are connected so as to combine outputs thereof.

Claim 7

An apparatus according to claim 2 which further comprises indicator means for indicating said level signal in said memory circuits.

Claim 8

An apparatus according to claim 3 wherein said level setting circuit includes a plurality of resistors connected in series with a voltage source, said resistors being connected in parallel with the switches, respectively, which are connected so as to combine outputs thereof.

Claim 9

An electronic attenuator apparatus comprising: a voltage controlled attenuator circuit having an input terminal and an output terminal and responsive to a control voltage signal for varying the attenuation factor applied to electronic signals passing through said attenuator circuit from said input to output terminals; level setting means for manually selecting a desired level of said control voltage signal; a hold circuit for storing said selected level of the control voltage signal and for supplying to said attenuator circuit said control voltage signal corresponding to said selected level stored in said hold circuit; and control means having manually operated input means and responsive thereto for effecting said storage into said hold circuit of said selected level of the control voltage signal.

Claim 10

An electronic attenuator apparatus comprising: a voltage controlled attenuator circuit having an input terminal and an output terminal and responsive to a control voltage signal for varying the attenuation factor applied to electronic signals passing through said attenuator circuit from said input to output terminals; level setting means for manually selecting a desired level of said control voltage signal; a hold circuit for storing said selected level of the control voltage signal and for supplying to said attenuator circuit said control voltage signal corresponding to said selected level stored in said hold circuit; and control means having manually operated input means and responsive thereto for effecting said storage into said hold circuit of said selected level of the control voltage signal.

Claim 11

The apparatus defined in claim 8, including a plurality of said voltage controlled attenuator circuits and a plurality of said hold circuits, each attenuator circuit having one of said hold circuits associated therewith, and said control means are further responsive to said input means for selectively storing in any said hold circuit a said selected level from said level setting means.

Claim 12

The apparatus defined in claim 9, wherein said hold circuits each comprise a semiconductor memory circuit.

Claim 13

The apparatus defined in claim 10, wherein said selected level from the level setting means is a digital binary-coded-decimal signal, said control voltage signal is an analog signal, said memory circuits are digital latch circuits, and said hold circuits each comprise digital-to-analog converter circuits for converting said digital selected level stored in the hold circuit into said analog control voltage signal for the associated attenuator circuit.

Claim 14

The apparatus defined in claim 11, wherein said level setting means comprise a plurality of switches and a decimal-to-binary converter responsive to said switches for producing said binary-coded-decimal selected level signal.

Claim 15

The apparatus defined in claim 9, wherein said level setting means comprise a plurality of voltage sources connected in series and a plurality of switches, each of said switches having one end connected to a respective junction between said connected sources, and the other ends of said switches being connected in common and to each of said hold circuits.

Claim 16

The apparatus defined in claim 9, wherein said level setting means comprise a plurality of resistors connected in series across a voltage source and a plurality of switches, each of said switches having one end connected to a respective junction between said connected resistors, and the other ends of said switches being connected in common and to each of said hold circuits.

Claim 17

The apparatus defined in claim 9, including indicator means responsive to the selected level in each said hold circuit for effecting a visual display of each such level.