Differential amplifiers utilizing MIS type field effect transistors

Claim 1

A differential amplifier comprising: a first MIS type field effect transistor having a drain electrode connected to a first source through first load means, and a gate electrode connected to a first terminal of a first capacitor; a second MIS type field effect transistor having a drain electrode connected to said first source through second load means, and a gate electrode connected to a first terminal of a second capacitor; a current source for supplying current to source electrodes of said first and second transistors; a third MIS type field effect transistor for interconnecting the drain and gate electrodes of said first MIS transistor; a fourth MIS type field effect transistor for interconnecting the gate and drain electrodes of said second transistor; a fifth MIS type field effect transistor for connecting a second terminal of said first capacitor to a first input terminal; a sixth MIS type field effect transistor for connecting a second terminal of said second capacitor to a second input terminal; output terminal means connected to the drain electrode of said first or second transistors; means controlled by a first clock signal for setting the second terminals of said first and second capacitors to the same potential; means for applying said first clock signal to the gate electrodes of said third and fourth transistors; and means for applying second clock signal to the gate electrodes of the fifth and sixth transistors, said second clock signal being not substantially with said overlapping first clock signal.