Signal switch circuit for plural analog signals

Claim 2

A signal switch circuit controlled by the D.C. level of a control signal, comprising: a first transistor having a base supplied with a first input signal, and an emitter for producing an output signal; a second transistor having a base supplied with a second input signal and an emitter connected to said first transistor emitter; a first switch circuit connected between the collector of said first transistor and a first power source, and actuated by first and second D.C. levels of said control signal; a second switch circuit connected between the collector of said second transistor and said first power source, and actuated by second and third D.C. levels of control signal; and a first impedance connected between a second power source and said first and second transistors emitters; and said first switch circuit being actuated by said first D.C. level to produce a signal at said first and second transistor emitters related to said first input signal, said second switch circuit being actuated by said third D.C. level to produce a signal at said first and second transistor emitters related to said second input signal, and said first and second switch circuits being actuated by said second D.C. level to produce a signal at said first and second transistor emitters related to a mixture of said first and second input signals.

Claim 3

A signal switch circuit according to claim 1, wherein: said first switch circuit comprises a third transistor having a collector connected to said first transistor collector, a base supplied with a first potential, an emitter and a conductivity type opposite to that of said first transistor; said second switch circuit comprises a fourth transistor having a collector connected to said second transistor collector, a base supplied with the D.C. potential of said control signal, an emitter, is connected to the first power source, and a conductivity type the same as that of said third transistor; and said apparatus includes a second impedance means; said third and fouth transistor emitters being connected to said first power source through said second impedance means.

Claim 4

A signal switch circuit controlled by a control signal comprising: a first transistor having a base supplied with a first input signal and an emitter for producing an output signal; a second transistor having a base supplied with a second input signal and an emitter connected to said first transistor emitter; a first switch circuit connected between the collector of said first transistor and a first power source, and actuated by the D.C. level of said control signal, said first switch circuit including a third transistor having a collector connected to the collector of said first transistor, a base supplied with a first potential and a conductivity type opposite to that of said first transistor; a first impedance connected to said first power source; a second switch circuit connected between the collector of said second transistor and said first power source, and actuated by the D.C. level of said control signal, said second switch circuit including a fourth transistor having a collector connected to the collector of said second transistor, a base supplied with the D.C. potential of said control signal, an emitter, and a conductivity type the same as that of said third transistor, said third and fourth transistor emitters being connected to said first power source through said first impedance; a second impedance connected between a second power source and said first and second transistor emitters; a third impedance connected to said first power source; a fifth transistor having a base connected to said emitters of said first and second transistors, a collector connected to said second power source, an emitter connected to said first power source through said third impedance, and a conductivity type opposite to that of said first and second transistors, said fifth transistor transmitting said output signal to prevent the operation point of said switch circuit from being affected by the D.C. level shift and temperature change (δV BE /δT) of said first and second transistors which result from variations in the base-emitter threshold voltage of said first and second transistors.

Claim 5

A signal switch circuit controlled by a control signal comprising: a first transistor having a base supplied with a first input signal and an emitter for producing an output signal; a second transistor having a base supplied with a second input signal and an emitter connected to said first transistor emitter; a first switch circuit connected between the collector of said first transistor and a first power source, and actuated by the D.C. level of said control signal, said first switch circuit including a third transistor having a collector connected to the collector of said first transistor, a base supplied with a first potential and a conductivity type opposite to that of said first transistor; a first impedance connected to said first power source; a second switch circuit connected between the collector of said second transistor and said first power source, and actuated by the D.C. level of said control signal, said second switch circuit including a fourth transistor having a collector connected to the collector of said second transistor, a base supplied with the D.C. potential of said control signal, an emitter, and a conductivity type the same as that of said third transistor, said third and fourth transistor emitters being connected to said first power source through said first impedance; a second impedance connected between a second power source and said first and second transistor emitters; a third impedance connected to said first power source; a fifth transistor having a base connected to said emitters of said first and second transistors, a collector connected to said second power source, an emitter connected to said first power source through said third impedance, and a conductivity type opposite to that of said first and second transistors, said fifth transistor transmitting said output signal to prevent the operation point of said switch circuit from being affected by the D.C. level shift and temperature change (δV BE /δT) of said first and second transistors which result from variations in the base-emitter threshold voltage of said first and second transistors.

Claim 6

A signal switch circuit controlled by a control signal comprising: a first transistor having a base supplied with a first input signal, and an emitter for producing an output signal; a second transistor having a base supplied with a second input signal and an emitter connected to said first transmitter emitter; a first switch circuit connected between the collector of said first transistor and a first power source, and actuated by the D.C. level of said control signal, said first switch circuit including a third transistor having a collector connected to the collector of said first transistor, a base supplied with a first potential and a conductivity type opposite to that of said first transistor; a first impedance connected to said first power source; a second switch circuit connected between the collector of said second transistor and said first power source, and actuated by the D.C. level of said control signal, said second switch circuit including a fourth transistor having a collector connected to the collector of said second transistor, a base supplied with the D.C. potential of said control signal, an emitter and a conductivity type the same as that of said third transistor, said third and fourth transistor emitters being connected to one terminal of first and second resistors, respectively, the other terminal of both of said first and second resistors being connected to said first power source through said first impedance, said first and second resistors to alleviate the critical rigidity with which the switching point of said third and fourth transistors is to be defined; and a second impedance connected between a second power source and said first and second transistor emitters.

Claim 7

A signal switch circuit controlled by a control signal comprising: a first transistor having a base supplied with a first input signal, and an emitter for producing an output signal; a second transistor having a base supplied with a second input signal and an emitter connected to said first transmitter emitter; a first switch circuit connected between the collector of said first transistor and a first power source, and actuated by the D.C. level of said control signal, said first switch circuit including a third transistor having a collector connected to the collector of said first transistor, a base supplied with a first potential and a conductivity type opposite to that of said first transistor; a first impedance connected to said first power source; a second switch circuit connected between the collector of said second transistor and said first power source, and actuated by the D.C. level of said control signal, said second switch circuit including a fourth transistor having a collector connected to the collector of said second transistor, a base supplied with the D.C. potential of said control signal, an emitter and a conductivity type the same as that of said third transistor, said third and fourth transistor emitters being connected to one terminal of first and second resistors, respectively, the other terminal of both of said first and second resistors being connected to said first power source through said first impedance, said first and second resistors to alleviate the critical rigidity with which the switching point of said third and fourth transistors is to be defined; and a second impedance connected between a second power source and said first and second transistor emitters.

Claim 8

A signal switch circuit controlled by at least one control signal comprising: a first group of transistors, each of the bases of said first group of transistors being supplied with a first independent input signal, respectively, and each of the emitters of said first group of transistors being commonly connected to produce an output signal; a second group of transistors, each of the bases of said second group of transistors being supplied with a second independent input signal, respectively, and each of the emitters of said second group of transistors being commonly connected to said first group emitters; a first switch circuit means connected between the collectors of said first group of transistors and a first power source, and actuated by the D.C. level of said control signal; a second switch circuit means connected between the collectors of said second group of transistors and the first power source, and actuated by the D.C. level of said control signal; and a first impedance connected between a second power source and the emitters of said first and second groups.

Claim 9

A signal switch circuit controlled by at least one control signal comprising: a first group of transistors, each of the bases of said first group of transistors being supplied with a first independent input signal, respectively, and each of the emitters of said first group of transistors being commonly connected to produce an output signal; a second group of transistors, each of the bases of said second group of transistors being supplied with a second independent input signal, respectively, and each of the emitters of said second group of transistors being commonly connected to said first group emitters; a first switch circuit means connected between the collectors of said first group of transistors and a first power source, and actuated by the D.C. level of said control signal; a second switch circuit means connected between the collectors of said second group of transistors and the first power source, and actuated by the D.C. level of said control signal; and a first impedance connected between a second power source and the emitters of said first and second groups.

Claim 10

A signal switch circuit according to claim 9, wherein: said first switch circuit means includes a third group of transistors, each of the bases of said third group of transistors being supplied with a comparison potential, said comparison potentials being separated mutually; and said second switch circuit means includes a fourth group of transistors, each of the bases of said third group of transistors being supplied with a control potential, said control potential being separated mutually.