← Back to Patent Explorer
US4259650A Expired / Lapsed US ⏱️ 0.0 years remaining

Sidelobe rejection filter

Assignee: ITT Inc
•
Filing: 1979-03-19
•
Granted: 1981-03-31
•
Expires: 1999-03-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Disclosed is a Sidelobe Rejection Filter for reducing the time sidelobes seen in the auto-correlation output signals from a matched filter. Such matched filters are used with radars utilizing pulse compression techniques, for example. The sidelobe rejection filter may be utilized whenever the time response of the auto-correlation signals includes a plurality of sidelobes each having a period τ and having essentially the same amplitude. Accordingly, the disclosed sidelobe rejection filter is particularly useful for pulse compression radars employing linear FM (i.e., Chirp) or Barker phase coded waveforms. The matched filter includes a delay circuit coupled to receive the time response of the auto-correlation signal, which delay circuit inserts a delay of τ, and a subtraction circuit for finding the difference between the delayed and undelayed time FM pulse compression techniques, the output of the subtraction circuit need merely be rectified to obtain an output signal whose sidelobes are substantially reduced in amplitude. In the case of phase coded pulse compression techniques using Barker codes, on the other hand, the output of the subtraction circuit is supplied to both positive and negative rectification circuits, one of whose outputs is then delayed by Nτ, where N is the number of bits in the Barker code. The output of the Nτ delay circuit is well as the output of the other rectification circuit is then applied to an adder for further reducing time sidelobes. The output of the adder is applied to yet another rectification circuit for providing an auto-correlation response which is substantially free of time sidelobes.

Inventors

  • 👤 Thomas H. Donahue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 12:55
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/06; G01S13/08; G01S13/10; G01S13/26; G01S13/28; G01S13/282; G01S13/284; G01S13/288

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 154 words
A filter for reducing time sidelobes in an input signal, said input signal including a plurality of said sidelobes each having a period τ, said filter comprising: delay means coupled to receive said input signal for delaying said output signal by τ; a subtraction circuit having two inputs and an output, one of said inputs being responsive to the delayed output of said delay means; means coupling the other of said subtraction circuit inputs to said input signal; first means responsive to said subtraction circuit output for capturing the positive portion of the signal thereat; second means responsive to said subtraction circuit output for capturing the negative portion of said signal thereat; second delay means coupled to receive the output of one of said first or second means; and adder means coupled to the output of said second delay means and to the output of the other of said first and second capturing means.
Claim 2
Dependent Claim 154 words
A filter for reducing time sidelobes in an input signal, said input signal including a plurality of said sidelobes each having a period τ, said filter comprising: delay means coupled to receive said input signal for delaying said output signal by τ; a subtraction circuit having two inputs and an output, one of said inputs being responsive to the delayed output of said delay means; means coupling the other of said subtraction circuit inputs to said input signal; first means responsive to said subtraction circuit output for capturing the positive portion of the signal thereat; second means responsive to said subtraction circuit output for capturing the negative portion of said signal thereat; second delay means coupled to receive the output of one of said first or second means; and adder means coupled to the output of said second delay means and to the output of the other of said first and second capturing means.
Claim 3
Dependent Claim 43 words
The filter according to claim 1, wherein said filter is adapted for filtering the autocorrelation output signal generated by a matched filter in response to a Barker Code having N bits and wherein said second delay means imposes a delay equal to Nτ.
Claim 4
Dependent Claim 43 words
The filter according to claim 1, wherein said filter is adapted for filtering the autocorrelation output signal generated by a matched filter in response to a Barker Code having N bits and wherein said second delay means imposes a delay equal to N+1/2τ.
Claim 5
Dependent Claim 22 words
The filter according to claims 1, 2 or 3 wherein said sidelobes in said output signal all have essentially the same amplitude.
Claim 6
Dependent Claim 18 words
The filter according to claim 1 wherein the amplitude of said sidelobes vary relatively slowly between adjacent sidelobes.
Claim 7
Dependent Claim 231 words
A filter for reducing time sidelobes in an input signal, said input signal including a pulse of desired information as well as a plurality of non-desired sidelobes each of period τ, the amplitudes of said sidelobes being substantially less than the amplitude of said desired pulse, said sidelobe amplitudes varying no more than relatively slightly between adjacent sidelobes, said filter comprising: a delay circuit coupled to receive said input signal for delaying said input signal by τ; a differencing circuit having two inputs and an output, one of said inputs being responsive to the output of said delay circuit and the other of said difference circuits being responsive to said input signal; first means for selecting that portion of the signal outputted from said differencing circuit having substantially only a first polarity; second means for selecting that portion of the signal outputted from said differencing circuit having substantially only a second polarity; a second delay circuit coupled to the output of said first selecting means for delaying the signal outputted from said first selecting means by a predetermined period of time; and an adder circuit having an input coupled to receive the output of said second selecting means and another input coupled to receive the output of said second delay circuit, the output of said adder circuit having time sidelobes suppressed in amplitude as compared to said pulse of desired information.
Claim 8
Dependent Claim 231 words
A filter for reducing time sidelobes in an input signal, said input signal including a pulse of desired information as well as a plurality of non-desired sidelobes each of period τ, the amplitudes of said sidelobes being substantially less than the amplitude of said desired pulse, said sidelobe amplitudes varying no more than relatively slightly between adjacent sidelobes, said filter comprising: a delay circuit coupled to receive said input signal for delaying said input signal by τ; a differencing circuit having two inputs and an output, one of said inputs being responsive to the output of said delay circuit and the other of said difference circuits being responsive to said input signal; first means for selecting that portion of the signal outputted from said differencing circuit having substantially only a first polarity; second means for selecting that portion of the signal outputted from said differencing circuit having substantially only a second polarity; a second delay circuit coupled to the output of said first selecting means for delaying the signal outputted from said first selecting means by a predetermined period of time; and an adder circuit having an input coupled to receive the output of said second selecting means and another input coupled to receive the output of said second delay circuit, the output of said adder circuit having time sidelobes suppressed in amplitude as compared to said pulse of desired information.
Claim 9
Dependent Claim 26 words
The filter as defined in claim 6, further including means for selecting that portion of the signal outputted from said adder circuit having a predetermined polarity.
Claim 10
Independent Claim 138 words
A method of filtering a signal having a pulse of desired information and a plurality of sidelobes, the amplitude of the sidelobes being substantially less than said pulse and varying no more than relatively slightly between adjacent sidelobes, the period of the sidelobes being τ, the method comprising the steps of: delaying said signal by τ; taking the difference between said signal and the delayed signal; separating the results of said subtracting step into positive and negative polarity signals; delaying a selected one of said positive and negative polarity signals by a predetermined amount of time; and adding the results of said delaying step and the other of said positive and negative polarity signals to obtain a filtered signal in which said sidelobes are suppressed in amplitude as compared to the amplitude of said pulse of desired information.
Claim 11
Independent Claim 138 words
A method of filtering a signal having a pulse of desired information and a plurality of sidelobes, the amplitude of the sidelobes being substantially less than said pulse and varying no more than relatively slightly between adjacent sidelobes, the period of the sidelobes being τ, the method comprising the steps of: delaying said signal by τ; taking the difference between said signal and the delayed signal; separating the results of said subtracting step into positive and negative polarity signals; delaying a selected one of said positive and negative polarity signals by a predetermined amount of time; and adding the results of said delaying step and the other of said positive and negative polarity signals to obtain a filtered signal in which said sidelobes are suppressed in amplitude as compared to the amplitude of said pulse of desired information.
Claim 12
Dependent Claim 39 words
The method as defined in claim 8, wherein the signal is an autocorrelation signal outputted from a matched filter in response to a Barker Code having N bits and wherein said predetermined amount of time is equal to Nτ.
Claim 13
Dependent Claim 54 words
The method as defined in claim 9, further including the steps of: a. separating the results of the adding step into positive and negative component signals; b. delaying a selected one of the positive and negative component signals by (N-1)τ; and c. adding the component signal delay by (N-1)τ to the other component signal.
Claim 14
Dependent Claim 26 words
The method as defined in claim 9, further including the step of outputting that portion of the results of the adding step having a predetermined polarity.

References Cited (Backward Citations)

US2957042A Cited
US3315171A Cited
US3651433A Cited
US3737808A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-03-30 1984-09-29 1985-03-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-03-30 1988-09-29 1989-03-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-03-30 1992-09-29 1993-03-31 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag