Patent US4258434A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4258434A Expired / Lapsed US ⏱️ 0.0 years remaining

Bit-by-bit time-division digital switching network

Assignee: Individual
•
Filing: 1979-06-18
•
Granted: 1981-03-24
•
Expires: 1999-06-18
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A bit-by-bit time-division digital switching network switches a plurality of incoming and outgoing isochronous digital data channels having rates which are different but sub-multiples of a given low rate. After phasing said incoming digital channels, bits having a predetermined binary state are detected. Previously stored address words of said outgoing digital channels to be switched to said incoming digital channels are read-out and correspond to switched incoming channels whose detected bits have said predetermined binary state. Then the read outgoing channel address words are multiplexed into a multiplex digital highway at high rate. In the transmission part of each outgoing digital channel address words of said outgoing digital channel are detected. A bit at said predetermined binary state or a bit in the other binary state is transmitted on the outgoing digital channel in response to the detection or failure of detect the address word of said outgoing digital channel.

Inventors

  • 👤 Albert Glowinski
  • 👤 Pierre M. Lucas

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 13:09
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/50; H04L12/52; H04J; H04J3/00; H04J3/24; H04J3/26; H04Q; H04Q11/00; H04Q11/04

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 202 words
A time-division digital switching network for switching a plurality of incoming and outgoing isochronous digital data channels having rates which are different but sub-multiples of a given low rate, said switching network comprising: means for phasing said incoming digital channels; means for detecting bits having a predetermined binary state from the phased incoming digital channels; means for storing address words of said outgoing digital channels to be switched to said incoming digital channels; means controlled by said predetermined by binary state bit detecting means for reading stored outgoing channel address words which correspond to switched incoming channels whose detected bits have said predetermined binary state; means for multiplexing the read outgoing channel address words into an address word multiplex digital highway at high rate; means interconnected to said multiplex digital highway and each outgoing digital channel for detecting said address words of said outgoing digital channel; and means associated with each outgoing digital channel and controlled by said address word detecting means for transmitting a bit at said predetermined binary state or a bit in the other binary state on said outgoing digital channel in response to the respective detection or failure to detect said address word of said outgoing digital channel.
Claim 2
Dependent Claim 202 words
A time-division digital switching network for switching a plurality of incoming and outgoing isochronous digital data channels having rates which are different but sub-multiples of a given low rate, said switching network comprising: means for phasing said incoming digital channels; means for detecting bits having a predetermined binary state from the phased incoming digital channels; means for storing address words of said outgoing digital channels to be switched to said incoming digital channels; means controlled by said predetermined by binary state bit detecting means for reading stored outgoing channel address words which correspond to switched incoming channels whose detected bits have said predetermined binary state; means for multiplexing the read outgoing channel address words into an address word multiplex digital highway at high rate; means interconnected to said multiplex digital highway and each outgoing digital channel for detecting said address words of said outgoing digital channel; and means associated with each outgoing digital channel and controlled by said address word detecting means for transmitting a bit at said predetermined binary state or a bit in the other binary state on said outgoing digital channel in response to the respective detection or failure to detect said address word of said outgoing digital channel.
Claim 3
Dependent Claim 104 words
A time-division digital switching network according to claim 1 comprising: means for transmitting a number of framing words equal to said given number of data word bits on said multiplex digital highway, each highway frame comprising a framing word and said multiplexed outgoing channel address words corresponding to the detection of incoming channel bit having said predetermined binary state and a same rank in said incoming channel data words; and means connected to said multiplex digital highway for detecting said framing words thereby controlling in function of the rate of each outgoing channel said address word detecting means in response to a framing word.
Claim 4
Dependent Claim 50 words
A time-division digital switching network according to claim 2 in which said address words of each frame succeed immediately to said framing word and are followed by a free time interval having a duration statistically equal to that of the time interval allocated to multiplexed address words of outgoing channels.
Claim 5
Dependent Claim 62 words
A time-division digital switching network according to claim 2, comprising means for transmitting predetermined data words other than those transmitted from said incoming digital channels on said multiplex digital highway, said predetermined data words being transmitted into time intervals of said frames which have a duration statistically equal to that of the time intervals allocated to multiplexed address words of outgoing channels.
Claim 6
Dependent Claim 83 words
A time-division digital switching network according to claim 2 in which 2 N incoming channels are switched with 2 N outgoing channels, said address words being each made up of N bits, and in which said address word multiplex digital highway is made up frames each containing 2 N +1 words, of which not more than 2 N are address words and one is an N-bit framing word and has a binary rate equal to (2 N +1)N times said given low rate.
Claim 7
Dependent Claim 219 words
A time-division digital switching network for switching a plurality of incoming and outgoing isochronous digital data channels transmitting data words consisting of a given number of bits and having rates which are different but sub-multiples of a given low rate, said switching network comprising: means for phasing said incoming digital channels; means for storing the bits having an equal rank in said phased incoming channel data words; means for detecting stored equal rank bits having a predetermined binary state; means for storing address words of said outgoing digital channels to be switched to said incoming digital channels; means controlled by said predetermined binary state bit detecting means for reading stored outgoing channel address words corresponding to switched incoming channels whose bits have said predetermined binary state and a same rank; means for multiplexing the read outgoing channel address words into an address word multiplex digital highway at high rate; means connected to said multiplex digital highway for detecting said address words of each outgoing digital channel; and means controlled by said address word detecting means for transmitting a bit having said predetermined binary state or the other binary state into said rank of a data word of said outgoing digital channel in response to the respective detection or failure to detect said address word of said outgoing digital channel.
Claim 8
Dependent Claim 219 words
A time-division digital switching network for switching a plurality of incoming and outgoing isochronous digital data channels transmitting data words consisting of a given number of bits and having rates which are different but sub-multiples of a given low rate, said switching network comprising: means for phasing said incoming digital channels; means for storing the bits having an equal rank in said phased incoming channel data words; means for detecting stored equal rank bits having a predetermined binary state; means for storing address words of said outgoing digital channels to be switched to said incoming digital channels; means controlled by said predetermined binary state bit detecting means for reading stored outgoing channel address words corresponding to switched incoming channels whose bits have said predetermined binary state and a same rank; means for multiplexing the read outgoing channel address words into an address word multiplex digital highway at high rate; means connected to said multiplex digital highway for detecting said address words of each outgoing digital channel; and means controlled by said address word detecting means for transmitting a bit having said predetermined binary state or the other binary state into said rank of a data word of said outgoing digital channel in response to the respective detection or failure to detect said address word of said outgoing digital channel.
Claim 9
Dependent Claim 340 words
A time-division digital switching network for switching a plurality of incoming and outgoing component digital data channels time-division multiplexed into incoming and outgoing multiplex data channels having rates which are different but sub-multiples of a given low rate, said component transmitting data words consisting of a given number of bits and being arranged in predetermined data word positions in incoming and outgoing multiplex channel frames, said switching network comprising: means for phasing said incoming multiplex channels; means for storing the bits having an equal rank in the incoming channel data words belonging to the phased incoming channel frames; means for detecting stored equal rank bits having a predetermined binary state; means for storing outgoing component channel address words having first and second parts, whose first part is the address of an outgoing multiplex channel and whose second part is the address of the outgoing component channel of said outgoing multiplex channel to be switched to an incoming component channel of an incoming multiplex channel; means controlled by said predetermined binary state bit detecting means for reading stored address words corresponding to switched incoming component channels, whose stored bits have said predetermined binary state and said same rank; means for multiplexing the read outgoing component channel address words into an address word multiplex digital highway at high rate; means connected to said multiplex digital highway for detecting said first part of said address words of each outgoing multiplex channel; means connected to said multiplex digital highway and controlled by said first address word part detecting means for detecting said second part of said address words of each outgoing component channel of said outgoing multiplex channel; and means controlled by said first and second address word part detecting means for transmitting a bit having said predetermined binary state or the other binary state into said rank of a data word of said outgoing component channel of said outgoing multiplex channel in response to the respective detection or failure to detect said first and second address word parts of said outgoing component channel.
Claim 10
Dependent Claim 340 words
A time-division digital switching network for switching a plurality of incoming and outgoing component digital data channels time-division multiplexed into incoming and outgoing multiplex data channels having rates which are different but sub-multiples of a given low rate, said component transmitting data words consisting of a given number of bits and being arranged in predetermined data word positions in incoming and outgoing multiplex channel frames, said switching network comprising: means for phasing said incoming multiplex channels; means for storing the bits having an equal rank in the incoming channel data words belonging to the phased incoming channel frames; means for detecting stored equal rank bits having a predetermined binary state; means for storing outgoing component channel address words having first and second parts, whose first part is the address of an outgoing multiplex channel and whose second part is the address of the outgoing component channel of said outgoing multiplex channel to be switched to an incoming component channel of an incoming multiplex channel; means controlled by said predetermined binary state bit detecting means for reading stored address words corresponding to switched incoming component channels, whose stored bits have said predetermined binary state and said same rank; means for multiplexing the read outgoing component channel address words into an address word multiplex digital highway at high rate; means connected to said multiplex digital highway for detecting said first part of said address words of each outgoing multiplex channel; means connected to said multiplex digital highway and controlled by said first address word part detecting means for detecting said second part of said address words of each outgoing component channel of said outgoing multiplex channel; and means controlled by said first and second address word part detecting means for transmitting a bit having said predetermined binary state or the other binary state into said rank of a data word of said outgoing component channel of said outgoing multiplex channel in response to the respective detection or failure to detect said first and second address word parts of said outgoing component channel.
Claim 11
Dependent Claim 145 words
A time-division digital switching network according to claim 7 comprising means for transmitting a number of framing words equal to said given number of data word bits on said multiplex digital highway, each highway frame comprising a framing word and said multiplexed outgoing component channel address words corresponding to the detection of incoming component channel bits having said predetermined binary state and a same rank in said data words of said incoming component channel data words of said incoming multiplex channel frames, and said multiplex digital highway conveying recurrent multiframe comprising a number of said highway frames equal to said given number of word bits, and means connected to said multiplex digital highway for detecting said framing words thereby controlling in function of said rate of each outgoing multiplex channel said first and second address word part detecting means in response to a framing word.
Claim 12
Dependent Claim 57 words
A time-division digital switching network according to claim 8 in which said address words of each highway frame succeed immediately to said framing word and are followed by a free time interval having a duration statistically equal to that of the time interval allocated to said multiplex address words of outgoing component channels of outgoing multiplex channels.
Claim 13
Dependent Claim 69 words
A time-division digital switching network according to claim 8 comprising means for transmitting predetermined data words other than those transmitted from said incoming component channels on said multiplex digital highway, said predetermined data words being transmitted into time intervals of said highway frames which have a duration statistically equal to that of the time intervals allocated to said multiplexed address words of outgoing component channels of outgoing multiplex channels.
Claim 14
Dependent Claim 129 words
A time-division digital switching network according to claim 8 in which 2 M component channels of 2 N incoming multiplex channels are switched with 2 M component channels of 2 N outgoing multiplex channels, said address words each comprising a first part having N bits and a second part having M bits, and said data word in said component channels each comprising r bits, and in which said address word multiplex digital highway is made up of a multiframe of r frames, each highway frame being made up of (2 M+N )+1 words, of which not more than 2 M+N are address words and one is a (N+M) bit framing word, and has a binary rate equal to (2 N +2 -M ) (M+N) times said given low rate.

References Cited (Backward Citations)

US3715505A Cited
US4117269A Cited
US3971891A Cited
US3988674A Cited
US4119795A Cited
US4110563A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-03-23 1984-09-22 1985-03-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-03-23 1988-09-22 1989-03-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-03-23 1992-09-22 1993-03-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag