Variable capacity data buffer system

Claim 2

A data buffer system for controlling the transfer of data between a processor, wherein the processor generates command signals, and an input/output (I/O) device comprising: data storage means having a maximum data storage capacity value; said data storage means being disposed between the processor and the I/O device for receiving data input from the processor and for outputting data to the I/O device to thereby transfer dta from the processor to the I/O device; said data storage means temporarily storing within said data storage means a predetermined amount of data while simultaneously transferring data between the processor and the I/O device; means responsive to the processor command signals for selectively establishing a threshold storage capacity value of said data storage means wherein said threshold storage capacity value is less than said maximum data storage capacity value; and means interconnected to said data storage means for maintaining said predetermined amount of data temporarily stored in said data storage means equal to said threshold storage capacity value while said data storage means receives data from the processor and outputs data to the I/O device.

Claim 3

The data buffer system of claim 1 wherein said means for selectively establishing said threshold storage capacity value includes: means responsive to the processor command signal for generating a control signal representative of said threshold storage capacity value.

Claim 4

The data buffer system of claim 2 wherein said means for maintaining said predetermined amount of data temporarily stored in said data storage means includes: means for determining the amount of data input from the processor into said data storage means; means for determining the amount of data output to the I/O device from said data storage means; means for inputting data from the processor to said data storage means when the amount of input data from the processor is less than the amount of data represented by said control signal; means for determining the difference in the amount of data input into said data storage means and the amount of data output to the I/O device and for generating a difference signal; means for comparing said control signal and said difference signal and for generating a transfer signal when said control signal equals said difference signal; and means for outputting data from said data storage means to the I/O device in response to said transfer signal.

Claim 5

The data buffer system of claim 1 wherein said data storage means comprises a first-in first-out data register.

Claim 6

The data buffer system of claim 1 wherein said data storage means comprises a random access memory.

Claim 7

The data buffer system of claim 1 wherein the input/output device comprises a magnetic tape device.

Claim 8

A data buffer system for controlling the transfer of data between a processor, wherein the processor generates command signals, and an input/output (I/O) device comprising: data storage means having a maximum data storage capacity value; said data storage means being disposed between the processor and the I/O device for receiving data input from the processor and for outputting data to the I/O device to thereby transfer data from the processor to the I/O device; said data storage means temporarily storing a predetermined amount of data within said data storage means while simultaneously transferring data between the processor and the I/O device; means responsive to the processor command signals for generating a control signal representative of a threshold storage capacity value of said data storage means wherein said threshold storage capacity value is less than said maximum data storage capacity value; logic means for determining the amount of data input from the processor into said data storage means and the amount of data output to the I/O device and for generating a difference signal representing the difference in the amount of data input to said data sytorage means and the amount of data output from said data storage means; first comparator means for comparing the amount of data input to said data storage means and said control signal; means responsive to said first comparator means for controlling the amount of data input to said data storage means; second comparator means for comparing said control signal and said difference signal; and means responsive to said second comparator means for outputting the data temporarily stored in said data storage means to the I/O device.

Claim 9

A data buffer system for controlling the transfer of data between a processor, wherein the processor generates command signals, and an input/output (I/O) device comprising: data storage means having a maximum data storage capacity value; said data storage means being disposed between the processor and the I/O device for receiving data input from the processor and for outputting data to the I/O device to thereby transfer data from the processor to the I/O device; said data storage means temporarily storing a predetermined amount of data within said data storage means while simultaneously transferring data between the processor and the I/O device; means responsive to the processor command signals for generating a control signal representative of a threshold storage capacity value of said data storage means wherein said threshold storage capacity value is less than said maximum data storage capacity value; logic means for determining the amount of data input from the processor into said data storage means and the amount of data output to the I/O device and for generating a difference signal representing the difference in the amount of data input to said data sytorage means and the amount of data output from said data storage means; first comparator means for comparing the amount of data input to said data storage means and said control signal; means responsive to said first comparator means for controlling the amount of data input to said data storage means; second comparator means for comparing said control signal and said difference signal; and means responsive to said second comparator means for outputting the data temporarily stored in said data storage means to the I/O device.

Claim 10

The data buffer system of claim 7 wherein said means responsive to said first comparator means causes the input of data to said data storage means when the amount of data stored within said data storage means is less than said threshold value.

Claim 11

The data buffer system of claim 7 wherein said means responsive to said second comparator means outputs data to the I/O device when said control signal equals said difference signal.

Claim 12

The data buffer system of claim 7 wherein said logic means includes counting means.

Claim 13

The data buffer system of claim 7 wherein said data storage means comprises a firt-in first-out data register.

Claim 14

The data buffer system of claim 7 wherein said data storage means comprises a random access memory.

Claim 17

The method of claim 13 and further including: determining the amount of data input into said storage device; determining the amount of data output to the I/O device; comparing the amount of data input into said data storage device with said threshold value; and outputting data to the I/O device at the moment when the amount of data input into said data storage device equals said threshold value.

Claim 18

The method of claim 14 and further including: comparing the amount of data output to the I/O device with the amount of data input into said data storage device to control the amount of data input to said data storage device so as to not exceed said threshold value.

Claim 19

A data buffer system for controlling the transfer of data between a processor, wherein the processor generates command signals, and an input/output (I/O) device comprising: data storage means having a maximum data storage capacity value; said data storage means being disposed between the processor and the I/O device for receiving data input from the processor and for outputting data to the I/O device to thereby transfer data from the processor to the I/O device; said data storage means temporarily storing within said data storage means a predetermined amount of data while simultaneously transferring data between the processor and the I/O device; means responsive to the processor command signals for selectively establishing a threshold storage capacity value of said data storage means wherein said threshold storage capacity value is less than said maximum data storage capacity value; and said predetermined amount of data temporarily stored in said data storage means being initially output to the I/O device when said predetermined amount of data temporarily stored in said data storage means equals said threshold storage capacity value.

Claim 20

A data buffer system for controlling the transfer of data between a processor, wherein the processor generates command signals, and an input/output (I/O) device comprising: data storage means having a maximum data storage capacity value; said data storage means being disposed between the processor and the I/O device for receiving data input from the processor and for outputting data to the I/O device to thereby transfer data from the processor to the I/O device; said data storage means temporarily storing within said data storage means a predetermined amount of data while simultaneously transferring data between the processor and the I/O device; means responsive to the processor command signals for selectively establishing a threshold storage capacity value of said data storage means wherein said threshold storage capacity value is less than said maximum data storage capacity value; and said predetermined amount of data temporarily stored in said data storage means being initially output to the I/O device when said predetermined amount of data temporarily stored in said data storage means equals said threshold storage capacity value.

Claim 21

The data buffer system of claim 16 where said predetermined amount of data temporarily stored in said data storage means is less than said threshold storage capacity value during output of said predetermined amount of data to the I/O device after outputting of data has begun from said data storage means to the I/O device.